Abov MC96F6432S Series User Manual

214
MC96F6432S
ABOV Semiconductor Co., Ltd.
USInCR3 (USIn Control Register 3: For UART, SPI, and I2C mode): DBH/EBH, n = 0, 1
7
6
5
4
3
2
1
0
MASTERn
LOOPSn
DISSCKn
USInSSEN
FXCHn
USInSB
USInTX8
USInRX8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Initial value: 00H
MASTERn
Selects master or slave in SPI and synchronous mode operation and controls the
direction of SCKn pin
0
Slave mode operation (External clock for SCKn).
1
Master mode operation(Internal clock for SCKn).
LOOPSn
Controls the loop back mode of USIn for test mode (only UART and SPI mode)
0
Normal operation
1
Loop Back mode
DISSCKn
In synchronous mode of operation, selects the waveform of SCKn output
0
ACK is free-running while UART is enabled in synchronous master mode
1
ACK is active while any frame is on transferring
USInSSEN
This bit controls the SSn pin operation (only SPI mode)
0
Disable
1
Enable (The SSn pin should be a normal input)
FXCHn
SPI port function exchange control bit (only SPI mode)
0
No effect
1
Exchange MOSIn and MISOn function
USInSB
Selects the length of stop bit in asynchronous or synchronous mode of operation.
0
1 Stop Bit
1
2 Stop Bit
USInTX8
The ninth bit of data frame in asynchronous or synchronous mode of operation. Write
this bit first before loading the USInDR register
0
MSB (9
th
bit) to be transmitted is ‘0’
1
MSB (9
th
bit) to be transmitted is ‘1’
USInRX8
The ninth bit of data frame in asynchronous or synchronous mode of operation. Read
this bit first before reading the receive buffer (only UART mode).
0
MSB (9
th
bit) received is ‘0’
1
MSB (9
th
bit) received is ‘1’

Abov MC96F6432S Series Specifications

General

Brand	Abov
Model	MC96F6432S Series
Category	Microcontrollers
Language	English