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ADCMT 7351A - Operation Event Register (OER)

ADCMT 7351A
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7351 Series Digital Multimeter Operation Manual
6.7.5 Status Register Structure
6-50
7. Operation event register
Allocation in the operation event register is shown in Table 6-9.
Conditions which clear the operation event register
When the power is turned on.
When the *CLS command is executed.
When the :STATus:OPERation[:EVENt]? command is executed.
When the OSR? command is executed.
Conditions which clear the operation event enable register
When the power is turned on.
When the :STATus:OPERation:ENABle 0 command is executed.
When the OSE0 command is executed.
Table 6-9 Operation Event Register (OER)
bit Name Description
0 Not used Always 0
1 Not used Always 0
2 Not used Always 0
3 Not used Always 0
4 Not used Always 0
5 Waiting for TRIG ON: This bit is set to 1 when this instrument is in Trigger Layer.
6 Not used Always 0
7 Not used Always 0
8 Not used Always 0
9 Idle ON: This bit is sets to 1 when this instrument is in the Idle state.
10 Not used Always 0
11 Not used Always 0
12 Not used Always 0
13 Not used Always 0
14 Not used Always 0
15 Not used Always 0

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