Model 5601MSC
Model 5601MSC Master SPG/Master Clock System
OPERATION Revision 2.2 Page - 55
* When the units are connected via DB15 cables as shown, this LTC input can be
used to apply a single LTC or IRIG reference to both 5601MSC units. If independent
timecode references are desired, then one of the DB15 cables must be modified to
break out the LTC/IRIG wires for connection to a separate timecode reference
source.
The 5601ACO2 allows for a dual-redundant installation of two 5601MSC units. Normally one of the
5601MSC units is designated to the master, and its 28 outputs are connected to Bank A of the
5601ACO2. The second 5601MSC unit is designated as the slave (or backup), and its 28 outputs are
connected to Bank B of the 5601ACO2. The 5601ACO2 then provides 28 relay-protected outputs to
feed downstream equipment. The 5601ACO2 can be switched manually (locally via front panel or
remotely via SNMP), or can be put into automatic mode where the outputs will be switched to the slave
unit if a problem is detected with the master.
In order for a seamless switch to occur, both 5601MSC units must be running at the same frequency
and phase. Ideally, this is done by locking both units to the same reference. It is possible to lock the
slave unit to the master but this reduces the protection offered by the ACO should a problem develop
with the master unit. Additionally, it is required that both 5601MSC units are configured identically so
that their outputs settings match. A syncro connection is automatically made inside the 5601ACO2 that
allows the master unit to communicate its settings to the slave unit. Implementing one of the syncro
modes, as described in section 2.3.3.3, allows the slave unit to synchronize all of its OUTPUT menu
item settings with the master unit. Any configuration change made on the master unit will be copied to
the slave unit automatically. This assures minimum impact should a changeover event occur.
The 5601ACO2 simplifies wiring by providing a single point of entry for an LTC reference, and GPIs for
both 5601MSC units. The LTC input to the 5601ACO2 is internally split to both master and slave units.
Similarly, the GPI inputs are split to both units, allowing any GPI trigger to affect both units
simultaneously.
The 5601ACO2 uses latching relays to provide a fail-safe signal path. These relays will maintain their
last state should the 5601ACO2 experience a power supply failure or main board failure. This ensures
glitch-free failure events and glitch-free recovery from failure.
All inputs from both 5601MSC units are passively monitored by the 5601ACO2. There are no active
components in the signal path. This is accomplished by splitting a small portion of the incoming signal
to the control/monitoring circuitry of the 5601ACO2. The high-speed SDI TG signals are treated
differently. When connected to a 5601ACO2, the SDI TGs must be set to highdrive mode. This is done
with the Output Drive control (see section 0). The higher amplitude provided by highdrive allows the
5601ACO2 to passively monitor the SDI TG outputs while still providing a SMPTE compliant serial
digital signal to downstream equipment.
All 28 outputs from the 5601MSC can be connected to the 5601ACO2, with the exception of the LTC1
and LTC2 primary XLR outputs (see note in section 3.1.4). These outputs are not isolated from the
secondary outputs on the GPIO connector and should be left unconnected for full protection of the
LTC1 and LTC2 outputs. The exception is when LTC1 power is turned on, in which case the LTC1 XLR
output is driven independently and may be used as an unprotected LTC output for downstream clocks.
The 5601ACO2 continually monitors the health of all signals with the exception of the analog audio
outputs. Refer to the 5601ACO2 instruction manual for a more detailed explanation of the monitoring
and switching modes available.
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