MC68332 REGISTER SUMMARY
USER’S MANUAL D-11
D.2.13 PICR — Periodic Interrupt Control Register $YFFA22
Contains information concerning periodic interrupt priority and vectoring. PICR[10:0]
can be read or written at any time. PICR[15:11] are unimplemented and always return
zero.
PIRQL[2:0] — Periodic Interrupt Request Level
This field determines the priority of periodic interrupt requests.
PIV[7:0] — Periodic Interrupt Vector
The bits of this field contain the interrupt vector number supplied by the SIM when the
CPU acknowledges an interrupt request.
D.2.14 PITR — Periodic Interrupt Timer Register $YFFA24
Contains the count value for the periodic timer. This register can be read or written at
any time.
PTP — Periodic Timer Prescaler Control
0 = Periodic timer clock not prescaled
1 = Periodic timer clock prescaled by a value of 512
PITM[7:0] — Periodic Interrupt Timing Modulus
This is the 8-bit timing modulus used to determine periodic interrupt rate. Use the fol-
lowing expression to calculate timer period.
D.2.15 SWSR — Software Service Register $YFFA27
When the software watchdog is enabled, a service sequence must be written to this
register within a specific interval. When read, SWSR always returns $00. Register
shown with read value.
D.2.16 TSTMSRA — Master Shift Register A $YFFA30
Register is used for factory test only.
D.2.17 TSTMSRB — Master Shift Register B $YFFA32
Register is used for factory test only.
15 14 13 12 11 10 8 7 0
0 0 0 0 0 PIRQL PIV
RESET:
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
15 14 13 12 11 10 9 8 7 0
0 0 0 0 0 0 0 PTP PITM
RESET:
0 0 0 0 0 0 0 MODCLK 0 0 0 0 0 0 0 0
15 8 7 6 5 4 3 2 1 0
NOT USED 0 0 0 0 0 0 0 0
RESET:
0 0 0 0 0 0 0 0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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