Freescale Semiconductor MC68332 - Page 225

REGISTER SUMMARY MC68332
D-10 USER’S MANUAL
D.2.12 SYPCR — System Protection Control Register $YFFA21
SYPCR controls system monitor functions, software watchdog clock prescaling, and
bus monitor timing. This register can be written once following power-on or reset.
SWE — Software Watchdog Enable
0 = Software watchdog disabled
1 = Software watchdog enabled
SWP — Software Watchdog Prescale
0 = Software watchdog clock not prescaled
1 = Software watchdog clock prescaled by 512
SWT[1:0] — Software Watchdog Timing
This field selects software watchdog time-out period.
HME — Halt Monitor Enable
0 = Disable halt monitor function
1 = Enable halt monitor function
BME — Bus Monitor External Enable
0 = Disable bus monitor function for an internal to external bus cycle.
1 = Enable bus monitor function for an internal to external bus cycle.
BMT[1:0] — Bus Monitor Timing
This field selects bus monitor time-out period.
15 8 7 6 5 4 3 2 1 0
NOT USED SWE SWP SWT HME BME BMT
RESET:
1 MODCLK 0 0 0 0 0 0
Software Watchdog Ratio
SWP SWT Ratio
000
2
9
001
2
11
010
2
13
011
2
15
100
2
18
101
2
20
110
2
22
111
2
24
Bus Monitor Period
BMT Bus Monitor Time-out Period
00 64 System Clocks
01 32 System Clocks
10 16 System Clocks
11 8 System Clocks
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Freescale Semiconductor, Inc.
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