MC68332 REGISTER SUMMARY
USER’S MANUAL D-17
RAMDS — RAM Array disabled
0 = RAM array is enabled
1 = RAM array is disabled
The TPURAM array is disabled by internal logic after a master reset. Writing a valid
base address to the RAM array base address field (bits [15:3]) automatically clears
RAMDS, enabling the RAM array.
Fr
ees
cale S
em
iconduct
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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