HBM MP85A - Zero Balance

Communication with a control system
96 A0293_06_E00_03 HBM: public MP85A
Input for transd. test
typ. 10 ms
Result transd. test
min. 5 ms
Fig. 10.3 Time diagram for a transducer test
10.4 Zero balance
Initiate zero balance via a digital input or a bus signal. At low filter limit frequen
cies, you have to wait until the filter settling time has elapsed before zero bal
ance. For zero balance, a pulse of at least 5 ms duration at the digital input is
required. Zero balance is completed another 5 ms later.
Zero balance
Ready
typ. 5 ms
min. 5 ms
Wait for filter
settling time
Fig. 10.4 Time diagram for zero balance