Intel Altera MAX 10 FPGA - Table of Contents

Contents
1. Overview........................................................................................................................ 4
1.1. Block Diagram.......................................................................................................6
1.2. Feature Summary..................................................................................................6
1.3. Box Contents........................................................................................................ 7
2. Getting Started............................................................................................................... 8
2.1. Before You Begin................................................................................................... 8
2.2. Handling the Board................................................................................................ 8
2.3. Software and Driver Installation.............................................................................. 8
2.3.1. Installing the Quartus Prime Software.......................................................... 8
2.3.2. Installing the Development Kit.....................................................................9
2.3.3. Installing the Intel FPGA Download Cable Driver...........................................10
2.4. Board Update Portal............................................................................................. 11
2.4.1. Step 1: Connect to the Board Update Portal.................................................11
2.4.2. Step 2: Update the User Software Portion................................................... 12
3. Board Test System........................................................................................................ 13
3.1. Using the Configure Menu..................................................................................... 14
3.2. The System Info Tab............................................................................................ 15
3.3. The GPIO Tab...................................................................................................... 17
3.4. The Flash Tab...................................................................................................... 18
3.5. The HSMC Tab..................................................................................................... 19
3.6. The DDR3 Tab..................................................................................................... 21
3.7. The ADC Tab....................................................................................................... 23
3.8. The HDMI Tab..................................................................................................... 25
3.9. The Sleep Mode Tab............................................................................................. 26
3.10. The Power Monitor............................................................................................. 27
3.11. The Clock Controller........................................................................................... 29
4. Document Revision History for the MAX 10 FPGA Development Kit User Guide............. 31
A. Development Kit Components....................................................................................... 33
A.1. Board Overview...................................................................................................33
A.2. Featured Device.................................................................................................. 36
A.3. Configuration...................................................................................................... 36
A.3.1. Using the Quartus Prime Programmer.........................................................37
A.3.2. Selecting the Internal Configuration Scheme............................................... 37
A.3.3. Switch and Jumper Settings...................................................................... 38
A.4. Status Elements.................................................................................................. 40
A.5. Setup Elements................................................................................................... 41
A.6. General User Input/Output....................................................................................42
A.7. Clock Circuitry.....................................................................................................43
A.7.1. On-Board Oscillators................................................................................ 43
A.7.2. Off-Board Clock Input/Output.................................................................... 44
A.8. Components and Interfaces...................................................................................45
A.8.1. 10/100/1000 Ethernet PHY....................................................................... 45
A.8.2. Digital-to-Analog Converter.......................................................................47
A.8.3. HDMI Video Output.................................................................................. 48
Contents
MAX
®
10 FPGA Development Kit User Guide
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