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Intel Altera MAX 10 FPGA - Using the Quartus Prime Programmer; Selecting the Internal Configuration Scheme

Intel Altera MAX 10 FPGA
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A.3.1. Using the Quartus Prime Programmer
You can use the Quartus Prime Programmer to configure the FPGA with a .sof.
Before configuring the FPGA:
Ensure that the Quartus Prime Programmer and the Intel FPGA Download Cable
driver are installed on the host computer.
The USB cable is connected to the kit.
Power to the board is on, and no other applications that use the JTAG chain are
running.
To configure the MAX 10 FPGA:
1. Start the Quartus Prime Programmer.
2.
Click Add File and select the path to the desired .sof.
3. Turn on the Program/Configure option for the added file.
4. Click Start to download the selected file to the FPGA. The configuration is
complete when the progress bar reaches 100%.
The Quartus Prime Convert Programming File (CPF) GUI can be used to generate
a .sof file that can use for internal configuration. You can directly program the flash
of the MAX 10 device, which included Configuration Flash Memory (CFM) and User
Flash Memory (UFM), by using a download cable with the Quartus Prime software
programmer.
A.3.2. Selecting the Internal Configuration Scheme
For all MAX 10 devices, except 10M02 device, there are total of 5 different modes you
can select internal configuration.
The internal configuration scheme needs to be selected before design compilation.
To select the configuration mode:
1. Open the Quartus Prime software and load a project using MAX 10 device family.
2. On the Assignments menu, click Device. The Device dialog box appears.
3. In the Device dialog box, click Device and Pin Options. The Device and Pin
Options dialog box appears.
4. In the Device and Pin Options dialog box, select Configuration from the
category pane.
5. In the Options list, do the following:.
a. In the Configuration scheme list, select Internal Configuration
b. In the Configuration mode list, select 1 out of 5 configuration modes. For
the dual-boot feature:
A. Development Kit Components
683460 | 2024.11.20
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10 FPGA Development Kit User Guide
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