B. Developer Resources
Use the following links to check the Intel website for other related information.
Table 39. MAX 10 FPGA Development Kit References
Reference Description
MAX 10 FPGA Development Kit page Latest board design files, reference designs, and kit installation for Windows*
and Linux*.
Rocketboard.org Open-source community website supporting SoC development including Altera
and Partner SoC development kit targets and related designs and
documentation.
Intel SoC FPGA Embedded Development
Suite (SoC EDS) User Guide
Installing the SoC EDS and Arm DS-5. Preloader user guide. Hard Processor
System (HPS) Flash programmer. Bare Metal and Linux* Compilers.
Debugging.
AN 958: Board Design Guidelines Board design-related resources for Altera
®
devices. Its goal is to help you
implement successful high-speed PCBs that integrate device(s) and other
elements.
MAX 10 Power Management User Guide Describes the MAX 10 device family's power-optimization features, power-up
and power-down sequences, power distribution network, and power
optimization techniques.
MAX 10 FPGA Configuration User Guide Describes the features and guidelines to configure the MAX 10 configuration
RAM. MAX 10 devices support configuration using the following interfaces:
JTAG and internal flash.
Documentation: MAX 10 MAX 10 device documentation.
Cadence* Capture CIS Schematic
Symbols
MAX 10 OrCAD symbols.
683460 | 2024.11.20
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Corporation. Altera and Intel warrant performance of its FPGA and semiconductor products to current
specifications in accordance with Altera’s or Intel's standard warranty as applicable, but reserves the right to
make changes to any products and services at any time without notice. Altera and Intel assume no
responsibility or liability arising out of the application or use of any information, product, or service described
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