EasyManua.ls Logo

Intel Altera MAX 10 FPGA - Page 20

Intel Altera MAX 10 FPGA
68 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Control Description
prbs31: Selects pseudo-random 31-bit sequences.
high_frequency: Divide by data pattern.
low_frequency: Divide by data pattern.
Error Control Detected errors: Displays the number of data errors detected in the
hardware.
Inserted errors: Displays the number of errors inserted into the
transmit data stream.
Bit error rate (BER): Displays the bit error rate of the interface
Insert Error: Inserts a one-word error into the transmit data stream
each time you click the button.
Clear: Resets the Detected errors and Inserted errors counters to
zeroes.
Test Control Stop: Resets the test.
Number of bits tested: Displays the number of bits tested since the
last reset.
3. Board Test System
683460 | 2024.11.20
MAX
®
10 FPGA Development Kit User Guide
Send Feedback
20

Table of Contents

Related product manuals