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Lattice Semiconductor ECP5 - General Purpose LEDs; LPDDR3 Memory Device

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ECP5 and ECP5-5G High-Speed I/O Interface
Technical Note
© 2014-2020 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-TN-02035-1.3 9
Acronyms in This Document
A list of acronyms used in this document.
Acronym
Definition
CLKDIV
Edge Clock Dividers
DDR
Double Data Rate
DLL
Delay-Locked Loops
DM
Data Mask
DSP
Digital Signal Processing
IDDR
Input DDR
ECLK
Edge Clock
ODDR
Output DDR
PCB
Printed Circuit Board
PCLK
Primary Clock
PIO
Programmable I/O
SDR
Single Data Rate
SSN
Simultaneous Switching Noise

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