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(3) When error is occurred.
(4) When the hold signal is input.
13-2-9. Output condition
Setting output logic Output data
Condition of
transistor
Pin-COM level
at the time of
voltage supply
externally.
Yes ON L
Negative logic
No OFF H
Yes OFF H
Positive logic
No ON L
● At the time of ERROR output, output transistor at ERROR signal will become ON(Negative logic electrically). Moreover, for each DATA,
all of the output transistor will become OFF at the time of ERROR output(Positive logic electrically).
● The input operation of HOLD signal is executed after the short circuit for approx. 100 ms or more.
● At the time of HOLD signal input, the output transistor of P.C. will be OFF condition(Positive logic electrically). However, as for P.C., OFF
condition will be made after one(1) shot of operation.
DATA
POL.
P.C.
ERROR
ON ON ON
ON
ON ONONON
ON
ON
HOLD
P.C.
POL.
DATA
ON ON
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