Neoway N75 - I2 S;Pcm; Figure 3-23 SDC DDR Timing; Table 3-4 Timing Parameters of SDC Interface

N75
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
33
Figure 3-23 SDC DDR timing
Command
Read
Command
Write
t(pdcwr)
t(csurd)
t(chrd)
SDC_CLK
DATA
Read
DATA
Write
t(dsurd)
t(dhrd)
t(pddwr)
t(pddwr)
Table 3-4 Timing parameters of SDC interface
Timing Parameter
Minimum
Value
Typical
Value
Maximum
Value
Unit
SDR mode (max. 200MHz)
t(cvdrd)
Command valid time
2.4
/
/
ns
t(dvdrd)
Data valid time
2.4
/
/
ns
t(pddwr)
Delay time from data write to transmit
-1.36
/
0.76
ns
t(pdcwr)
Delay time from command write to transmit
-1.36
/
0.76
ns
DDR mode (max. 50MHz)
t(chrd)
Command hold time
1.5
/
/
ns
t(csurd)
Command set-up time
6.3
/
/
ns
(dhrd)
Data hold time
1.5
/
/
ns
t(dsurd)
Data set-up time
2
/
/
ns
t(pddwr)
Delay time from data write to transmit
0.8
/
6
ns
t(pdcwr)
Delay time from command write to transmit
-8.2
/
3
ns
3.3.6 I2S/PCM
Signal
Pin
I/O
Function
Remarks
I2S_MCLK
64
DO
I2S main clock
12.288 MHz by default