Neoway N75 - Figure 3-24 I2 S Connection

N75
Hardware User Guide
Copyright © Neoway Technology Co., Ltd
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I2S_1_SCLK
9
DO
I2S serial clock
Multiplexed as PCM_CLK
I2S_1_DOUT
10
DO
I2S data transmit
Multiplexed as PCM_DOUT
I2S_1_DIN
11
DI
I2S data receive
Multiplexed as PCM_DIN
I2S_1_WS
12
B
I2S word select
Multiplexed as PCM_SYNC
N75 provides one I2S/PCM multiplex interface that supports 1.8V. Figure 3-24 shows I2S connection.
Figure 3-24 I2S connection
I2S_TX
I2S_RX
I2S_WS
I2S_SCLK
N75 module
Codec
I2S_MCLK I2S_MCLK
I2S_DIN
I2S_DOUT
I2S_LRCLK
I2S_BCLK
Schematic Guidelines
⚫
If the levels of N75 and CODEC do not match, add a level shift circuit as shown in 3.3.4.
⚫
Leave I2S_MCLK floating in your application if it is not required for the CODEC chipset selected.
PCB Design Guidelines
⚫
Do not cross other traces if possible. If crossing is inevitable, route the I2S traces perpendicular
to other traces.
⚫
Keep I2S traces far away from areas that might introduce ESD.
⚫
Surround I2S_MCLK signal traces with ground.
The I2S function complies with Phillips I2S Bus Specifications revised June 5, 1996.