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Rise time for SCL and SDA
Fall time for SCL and SDA
Set-up time for STOP condition
Bus free time between STOP and START
condition
Data invalid acknowledge time
Table 3-12 I2C timing parameters (fast mode)
Hold time (repeated) START condition
LOW period of the SCL pin
HIGH period of the SCL pin
Set-up time for a repeated START
condition
Rise time for SCL and SDA
Fall time for SCL and SDA
Set-up time for STOP condition
Bus free time between STOP and START
condition
Data invalid acknowledge time
Table 3-13 I2C timing parameters (fast mode plus)
Hold time (repeated) START condition