NXP Semiconductors QorIQ LX2160A - Page 32

Aquantia
AQR107
PCIe x4 slot
Gen 1-4
LX2160A
x4
Inphi
CS4223
QSFP+
40G-SR4
40G-CR4
40G-KR4
S
E
R
D
E
S
1
Dual RJ45
USXGMII
2x 10G
Dual cage
SFP+
2x 25G
x4
Aquantia
AQR107
Inphi
IN112525
x2
x2
x4
x2
x2
H,G
0,1
F,E
2,3
D-A
4-7
x4
S
E
R
D
E
S
2
A-D
0-3
SATA 3.0SATA 3.0
E-H
4-7
S
E
R
D
E
S
3
PCIe x8 slot
Gen 1-4
x8
A-H
0-7
Protocol #19
Protocol #5
Protocol #2
40G MAC2
25G MAC5
25G MAC6
10G MAC3
10G MAC4
Figure 2-9. SerDes architecture
The figure below shows the possible SerDes protocol combinations that can be used on
the LX2160ARDB with the LX2160A processor.
SerDes interface
QorIQ LX2160A Reference Design Board Reference Manual, Rev. 0, 09/2018
32 NXP Semiconductors