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Renesas RL78/G13 User Manual
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RL78/G13
CHAPTER 3 CPU ARCHITECTURE
R01UH0146EJ0100 Rev.1.00
135
Sep 22, 2011
3.2.3 ES and CS registers
The ES register is used for data access
and the CS register is used to s
pecify the higher address when a branc
h
instruction is executed.
The default value of the ES register after reset
is 0FH, and that of the CS register is 00H.
Figure 3-27. Configuration of ES and CS Registers
0
0
0
0
ES3
ES2
ES1
ES0
70
ES
6
5
4
3
21
0
0
0
0
CS3
CP2
CP1
CP0
70
CS
6
5
4
3
21
153
155
Table of Contents
Default Chapter
7
Table of Contents
7
Chapter 1 Outline
20
Features
20
Ordering Information
22
Pin Configuration (Top View)
25
20-Pin Products
25
24-Pin Products
26
25-Pin Products
27
30-Pin Products
28
32-Pin Products
29
36-Pin Products
30
40-Pin Products
31
44-Pin Products
32
48-Pin Products
33
52-Pin Products
35
64-Pin Products
36
80-Pin Products
38
100-Pin Products
39
128-Pin Products
41
Pin Identification
42
Block Diagram
43
20-Pin Products
43
24-Pin Products
44
25-Pin Products
45
30-Pin Products
46
32-Pin Products
47
36-Pin Products
48
40-Pin Products
49
44-Pin Products
50
48-Pin Products
51
52-Pin Products
52
64-Pin Products
53
80-Pin Products
54
100-Pin Products
55
128-Pin Products
56
Outline of Functions
57
Chapter 2 Pin Functions
63
Pin Function List
63
20-Pin Products
64
24-Pin Products
65
25-Pin Products
66
30-Pin Products
67
32-Pin Products
69
36-Pin Products
71
40-Pin Products
73
44-Pin Products
75
48-Pin Products
77
52-Pin Products
79
64-Pin Products
81
80-Pin Products
83
100-Pin Products
86
128-Pin Products
89
Pins for each Product (Pins Other than Port Pins)
93
Description of Pin Functions
99
P00 to P07 (Port 0)
99
P10 to P17 (Port 1)
100
P20 to P27 (Port 2)
101
P30 to P37 (Port 3)
101
P40 to P47 (Port 4)
102
P50 to P57 (Port 5)
104
P60 to P67 (Port 6)
104
P70 to P77 (Port 7)
105
P80 to P87 (Port 8)
106
P90 to P97 (Port 9)
106
P100 to P106 (Port 10)
106
P110 to P117 (Port 11)
107
P120 to P127 (Port 12)
107
P130, P137 (Port 13)
108
P140 to P147 (Port 14)
108
P150 to P156 (Port 15)
110
VDD , Ev Dd0 , Ev Dd1 , V Ss , Ev Ss0 , Ev Ss1
110
Reset
110
Regc
110
Pin I/O Circuits and Recommended Connection of Unused Pins
111
Chapter 3 Cpu Architecture
117
Memory Space
117
Internal Program Memory Space
133
Mirror Area
136
Internal Data Memory Space
138
Special Function Register (SFR) Area
139
Extended Special Function Register (2Nd SFR: 2Nd Special Function Register) Area
139
Data Memory Addressing
140
Processor Registers
150
Control Registers
150
General-Purpose Registers
152
ES and CS Registers
154
Special Function Registers (Sfrs)
155
Extended Special Function Registers (2Nd Sfrs: 2Nd Special Function Registers)
161
Instruction Address Addressing
170
Relative Addressing
170
Immediate Addressing
170
Table Indirect Addressing
171
Register Direct Addressing
172
Addressing for Processing Data Addresses
173
Implied Addressing
173
Register Addressing
173
Direct Addressing
174
Short Direct Addressing
175
SFR Addressing
176
Register Indirect Addressing
177
Based Addressing
178
Based Indexed Addressing
181
Stack Addressing
182
Chapter 4 Port Functions
183
Port Functions
183
Port Configuration
184
Port 0
186
Port 1
194
Port 2
204
Port 3
206
Port 4
211
Port 5
220
Port 6
227
Port 7
230
Port 8
237
Port 9
241
Port 10
246
Port 11
250
Port 12
250
Port 13
258
Port 14
260
Port 15
268
Registers Controlling Port Function
270
Port Function Operations
289
Writing to I/O Port
289
Reading from I/O Port
289
Operations on I/O Port
289
Connecting to External Device with Different Potential (1.8 V, 2.5 V, 3 V)
290
Settings of Port Mode Register, and Output Latch When Using Alternate Function
292
Cautions When Using Port Function
298
Cautions on 1-Bit Manipulation Instruction for Port Register N (Pn)
298
Cautions on the Pin Settings on the Products Other than 128-Pin
299
Chapter 5 Clock Generator
301
Functions of Clock Generator
301
Configuration of Clock Generator
303
Registers Controlling Clock Generator
305
System Clock Oscillator
321
X1 Oscillator
321
XT1 Oscillator
321
High-Speed On-Chip Oscillator
325
Low-Speed On-Chip Oscillator
325
Clock Generator Operation
326
Controlling Clock
328
Example of Setting High-Speed On-Chip Oscillator
328
Example of Setting X1 Oscillation Clock
329
Example of Setting XT1 Oscillation Clock
330
CPU Clock Status Transition Diagram
331
Condition before Changing CPU Clock and Processing after Changing CPU Clock
337
Time Required for Switchover of CPU Clock and Main System Clock
339
Conditions before Clock Oscillation Is Stopped
340
Chapter 6 Timer Array Unit
341
Functions of Timer Array Unit
343
Independent Channel Operation Function
343
Simultaneous Channel Operation Function
344
8-Bit Timer Operation Function (Channels 1 and 3 Only)
345
LIN-Bus Supporting Function (Channel 7 of Unit 0 Only)
346
Configuration of Timer Array Unit
347
Registers Controlling Timer Array Unit
353
Basic Rules of Timer Array Unit
378
Basic Rules of Simultaneous Channel Operation Function
378
Basic Rules of 8-Bit Timer Operation Function (Channels 1 and 3 Only)
380
Operation Timing of Counter
381
Count Clock (Ftclk)
381
Start Timing of Counter
383
Channel Output (Tomn Pin) Control
389
Tomn Pin Output Circuit Configuration
389
Tomn Pin Output Setting
390
Cautions on Channel Output Operation
391
Collective Manipulation of Tomn Bit
397
Timer Interrupt and Tomn Pin Output at Operation Start
398
Independent Channel Operation Function of Timer Array Unit
399
Operation as Interval Timer/Square Wave Output
399
Operation as External Event Counter
405
Operation as Frequency Divider (Channel 0 of Unit 0 Only)
410
Operation as Input Pulse Interval Measurement
414
Operation as Input Signal High-/Low-Level Width Measurement
418
Operation as Delay Counter
422
Simultaneous Channel Operation Function of Timer Array Unit
427
Operation as One-Shot Pulse Output Function
427
Operation as PWM Function
434
Operation as Multiple PWM Output Function
441
Cautions When Using Timer Array Unit
449
Cautions When Using Timer Output
449
Chapter 7 Real-Time Clock
450
Functions of Real-Time Clock
450
Configuration of Real-Time Clock
450
Registers Controlling Real-Time Clock
452
Real-Time Clock Operation
467
Starting Operation of Real-Time Clock
467
Shifting to STOP Mode after Starting Operation
468
Reading/Writing Real-Time Clock
469
Setting Alarm of Real-Time Clock
471
Hz Output of Real-Time Clock
472
Example of Watch Error Correction of Real-Time Clock
473
Chapter 8 Interval Timer
476
Functions of Interval Timer
476
Configuration of Interval Timer
476
Registers Controlling Interval Timer
477
Interval Timer Operation
480
Chapter 9 Clock Output/Buzzer Output Controller
481
Functions of Clock Output/Buzzer Output Controller
481
Configuration of Clock Output/Buzzer Output Controller
483
Registers Controlling Clock Output/Buzzer Output Controller
483
Operations of Clock Output/Buzzer Output Controller
486
Operation as Output Pin
486
Chapter 10 Watchdog Timer
487
Functions of Watchdog Timer
487
Configuration of Watchdog Timer
488
Register Controlling Watchdog Timer
489
Operation of Watchdog Timer
490
Controlling Operation of Watchdog Timer
490
Setting Overflow Time of Watchdog Timer
491
Setting Window Open Period of Watchdog Timer
492
Setting Watchdog Timer Interval Interrupt
493
Chapter 11 A/D Converter
494
Function of A/D Converter
494
Configuration of A/D Converter
496
Registers Used in A/D Converter
498
A/D Converter Conversion Operations
523
Input Voltage and Conversion Results
525
A/D Converter Operation Modes
526
Software Trigger Mode (Select Mode, Sequential Conversion Mode)
526
Software Trigger Mode (Select Mode, One-Shot Conversion Mode)
527
Software Trigger Mode (Scan Mode, Sequential Conversion Mode)
528
Software Trigger Mode (Scan Mode, One-Shot Conversion Mode)
529
Hardware Trigger No-Wait Mode (Select Mode, Sequential Conversion Mode)
530
Hardware Trigger No-Wait Mode (Select Mode, One-Shot Conversion Mode)
531
Hardware Trigger No-Wait Mode (Scan Mode, Sequential Conversion Mode)
532
Hardware Trigger No-Wait Mode (Scan Mode, One-Shot Conversion Mode)
533
Hardware Trigger Wait Mode (Select Mode, Sequential Conversion Mode)
534
Hardware Trigger Wait Mode (Select Mode, One-Shot Conversion Mode)
535
Hardware Trigger Wait Mode (Scan Mode, Sequential Conversion Mode)
536
Hardware Trigger Wait Mode (Scan Mode, One-Shot Conversion Mode)
537
A/D Converter Setup Flowchart
538
Setting up Software Trigger Mode
539
Setting up Hardware Trigger No-Wait Mode
540
Setting up Hardware Trigger Wait Mode
541
Setup When Using Temperature Sensor
542
Mode)
542
Setting up Test Mode
543
SNOOZE Mode Function
544
How to Read A/D Converter Characteristics Table
547
Cautions for A/D Converter
549
Chapter 12 Serial Array Unit
553
Functions of Serial Array Unit
555
3-Wire Serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21, CSI30, CSI31)
555
UART (UART0 to UART3)
556
Simplified I 2 C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30, IIC31)
557
Configuration of Serial Array Unit
558
Registers Controlling Serial Array Unit
564
Operation Stop Mode
590
Stopping the Operation by Units
591
Stopping the Operation by Channels
592
Operation of 3-Wire Serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21, CSI30, CSI31) Communication
593
Master Transmission
596
Master Reception
606
Master Transmission/Reception
615
Slave Transmission
624
Slave Reception
633
Slave Transmission/Reception
640
SNOOZE Mode Function
650
Calculating Transfer Clock Frequency
654
Procedure for Processing Errors that Occurred During 3-Wire Serial I/O
656
CSI20, CSI21, CSI30, CSI31) Communication
656
Operation of UART (UART0 to UART3) Communication
657
UART Transmission
660
UART Reception
670
SNOOZE Mode Function
677
Calculating Baud Rate
682
Procedure for Processing Errors that Occurred During UART (UART0 to UART3) Communication667
686
LIN Communication Operation
687
LIN Transmission
687
LIN Reception
690
Operation of Simplified I C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30, IIC31) Communication
696
Address Field Transmission
699
Data Transmission
705
Data Reception
709
Stop Condition Generation
714
Calculating Transfer Rate
715
Procedure for Processing Errors that Occurred During Simplified I C
717
IIC20, IIC21, IIC30, IIC31) Communication
717
Chapter 13 Serial Interface Iica
718
Functions of Serial Interface IICA
718
Configuration of Serial Interface IICA
721
Registers Controlling Serial Interface IICA
724
I C Bus Mode Functions
738
Pin Configuration
738
Setting Transfer Clock by Using IICWL0 and IICWH0 Registers
739
I C Bus Definitions and Control Methods
741
Start Conditions
741
Addresses
742
Transfer Direction Specification
742
Acknowledge (ACK)
743
Stop Condition
744
Wait
745
Canceling Wait
747
Interrupt Request (INTIICA0) Generation Timing and Wait Control
748
Address Match Detection Method
749
Error Detection
749
Extension Code
749
Arbitration
750
Wakeup Function
752
Communication Reservation
755
Cautions
759
Communication Operations
760
Timing of I 2 C Interrupt Request (INTIICA0) Occurrence
767
Timing Charts
788
Chapter 14 Multiplier and Divider/Multiply-Accumulator
803
Functions of Multiplier and Divider/Multiply-Accumulator
803
Configuration of Multiplier and Divider/Multiply-Accumulator
803
Register Controlling Multiplier and Divider/Multiply-Accumulator
809
Operations of Multiplier and Divider/Multiply-Accumulator
811
Multiplication (Unsigned) Operation
811
Multiplication (Signed) Operation
812
Multiply-Accumulation (Unsigned) Operation
813
Multiply-Accumulation (Signed) Operation
815
Division Operation
817
Chapter 15 Dma Controller
819
Functions of DMA Controller
819
Configuration of DMA Controller
820
Registers Controlling DMA Controller
823
Operation of DMA Controller
828
Operation Procedure
828
Transfer Mode
829
Termination of DMA Transfer
829
Example of Setting of DMA Controller
830
CSI Consecutive Transmission
830
Consecutive Capturing of A/D Conversion Results
832
UART Consecutive Reception + ACK Transmission
834
Holding DMA Transfer Pending by Dwaitn Bit
836
Forced Termination by Software
837
Cautions on Using DMA Controller
839
Chapter 16 Interrupt Functions
841
Interrupt Function Types
841
Interrupt Sources and Configuration
841
Registers Controlling Interrupt Functions
848
Interrupt Servicing Operations
861
Maskable Interrupt Request Acknowledgment
861
Software Interrupt Request Acknowledgment
864
Multiple Interrupt Servicing
864
Interrupt Request Hold
868
Chapter 17 Key Interrupt Function
869
Functions of Key Interrupt
869
Configuration of Key Interrupt
869
Register Controlling Key Interrupt
871
Chapter 18 Standby Function
872
Standby Function and Configuration
872
Standby Function
872
Registers Controlling Standby Function
873
Standby Function Operation
876
HALT Mode
876
STOP Mode
881
SNOOZE Mode
886
Chapter 19 Reset Function
888
Register for Confirming Reset Source
898
Chapter 20 Power-On-Reset Circuit
900
Functions of Power-On-Reset Circuit
900
Configuration of Power-On-Reset Circuit
901
Operation of Power-On-Reset Circuit
901
Cautions for Power-On-Reset Circuit
904
Chapter 21 Voltage Detector
906
Functions of Voltage Detector
906
Configuration of Voltage Detector
907
Registers Controlling Voltage Detector
907
Operation of Voltage Detector
912
When Used as Reset Mode
912
When Used as Interrupt Mode
914
When Used as Interrupt and Reset Mode
916
Cautions for Voltage Detector
919
Chapter 22 Safety Functions
921
Overview of Safety Functions
921
Registers Used by Safety Functions
922
Operation of Safety Functions
922
Flash Memory CRC Operation Function (High-Speed CRC)
922
CRC Operation Function (General-Purpose CRC)
926
RAM Parity Error Detection Function
928
RAM Guard Function
929
SFR Guard Function
930
Invalid Memory Access Detection Function
931
Frequency Detection Function
933
A/D Test Function
935
Chapter 23 Regulator
939
Regulator Overview
939
Chapter 24 Option Byte
940
Functions of Option Bytes
940
User Option Byte (000C0H to 000C2H/010C0H to 010C2H)
940
On-Chip Debug Option Byte (000C3H/ 010C3H)
941
Format of User Option Byte
942
Format of On-Chip Debug Option Byte
946
Setting of Option Byte
947
Chapter 25 Flash Memory
948
Writing to Flash Memory by Using Flash Memory Programmer
949
Programming Environment
951
Communication Mode
951
Writing to Flash Memory by Using External Device (that Incorporates UART)
952
Programming Environment
952
Communication Mode
953
Connection of Pins on Board
954
P40/TOOL0 Pin
954
RESET Pin
954
Port Pins
955
REGC Pin
955
X1 and X2 Pins
955
Power Supply
955
Data Flash
956
Data Flash Overview
956
Register Controlling Data Flash Memory
957
Procedure for Accessing Data Flash Memory
958
Programming Method
959
Controlling Flash Memory
959
Flash Memory Programming Mode
960
Selecting Communication Mode
961
Communication Commands
962
Description of Signature Data
963
Security Settings
964
Flash Memory Programming by Self-Programming
966
Boot Swap Function
968
Flash Shield Window Function
970
Chapter 26 On-Chip Debug Function
971
Connecting E1 On-Chip Debugging Emulator to RL78/G13
971
On-Chip Debug Security ID
972
Securing of User Resources
972
Chapter 27 Bcd Correction Circuit
974
BCD Correction Circuit Function
974
Registers Used by BCD Correction Circuit
974
BCD Correction Circuit Operation
975
Chapter 28 Instruction Set
977
Conventions Used in Operation List
978
Operand Identifiers and Specification Methods
978
Description of Operation Column
979
Description of Flag Operation Column
980
PREFIX Instruction
980
Operation List
981
Chapter 29 Electrical Specifications
998
Pins Mounted According to Product
998
Port Functions
998
Non-Port Functions
998
Absolute Maximum Ratings
999
Oscillator Characteristics
1001
Main System Clock Oscillator Characteristics
1001
On-Chip Oscillator Characteristics
1002
Subsystem Clock Oscillator Characteristics
1003
Recommended Oscillator Constants
1004
DC Characteristics
1007
Pin Characteristics
1007
Supply Current Characteristics
1012
AC Characteristics
1025
Basic Operation
1025
Peripheral Functions Characteristics
1027
Serial Array Unit
1027
Serial Interface IICA
1050
On-Chip Debug (UART)
1051
Analog Characteristics
1051
A/D Converter Characteristics
1051
Temperature Sensor Characteristics
1055
POR Circuit Characteristics
1055
LVD Circuit Characteristics
1056
Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics
1059
Flash Memory Programming Characteristics
1059
Timing Specs for Switching Modes
1060
Chapter 30 Package Drawings
1061
20-Pin Products
1061
24-Pin Products
1062
25-Pin Products
1063
30-Pin Products
1064
32-Pin Products
1065
36-Pin Products
1066
40-Pin Products
1067
44-Pin Products
1068
48-Pin Products
1069
52-Pin Products
1071
64-Pin Products
1072
80-Pin Products
1076
100-Pin Products
1078
128-Pin Products
1080
Appendix A Revision History
1081
Major Revisions in this Edition
1081
Revision History of Preceding Editions
1088
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Renesas RL78/G13 Specifications
General
Brand
Renesas
Model
RL78/G13
Category
Computer Hardware
Language
English
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