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Renesas RL78/G13 - AC Characteristics; Basic Operation

Renesas RL78/G13
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RL78/G13 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0146EJ0100 Rev.1.00 1006
Sep 22, 2011
Caution The pins mounted depend on the product. Refer to 2.1.1 20-pin products to 2.1.14 128-pin products,
and 2.1.15 Pins for each product (pins other than port pins).
29.5 AC Characteristics
29.5.1 Basic operation
(TA = 40 to +85°C, 1.6 V EVDD0 = EVDD1 VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Items Symbol Conditions MIN. TYP. MAX. Unit
2.7 V
V
DD
5.5 V
0.03125 1
μ
s High-speed
main mode
2.4 V
V
DD
< 2.7 V
0.0625 1
μ
s
Low voltage
main mode
1.6 V
V
DD
5.5 V
0.25 1
μ
s
Main
system
clock (f
MAIN)
operation
Low-speed
main mode
1.8 V
V
DD
5.5 V
0.125 1
μ
s
Subsystem clock (fSUB)
operation
1.8 V
V
DD
5.5 V
28.5 30.5 31.3
μ
s
2.7 V
V
DD
5.5 V
0.03125 1
μ
s High-speed
main mode
2.4 V
V
DD
< 2.7 V
0.0625 1
μ
s
Low voltage
main mode
1.8 V
V
DD
5.5 V
0.25 1
μ
s
Instruction cycle (minimum
instruction execution time)
TCY
In the self
programming
mode
Low-speed
main mode
1.8 V
V
DD
5.5 V
0.125 1
μ
s
2.7 V VDD 5.5 V 1.0 20.0 MHz
1.8 V VDD < 2.7 V 1.0 8.0 MHz
fEX
1.6 V V
DD < 1.8 V 1.0 4.0 MHz
External main system clock
frequency
f
EXS 32 35 kHz
2.7 V VDD 5.5 V 24 ns
1.8 V VDD < 2.7 V 60 ns
tEXH, tEXL
1.6 V VDD < 1.8 V 120 ns
External main system clock input
high-level width, low-level width
t
EXHS, tEXLS 13.7
μ
s
TI00 to TI07, TI10 to TI17 input
high-level width, low-level width
tTIH,
t
TIL
1/f
MCK+10 ns
Note
4.0 V EVDD0 5.5 V 16 MHz
2.7 V EVDD0 < 4.0 V 8 MHz
1.8 V EVDD0 < 2.7 V 4 MHz
High-speed main
mode
1.6 V EV
DD0 < 1.8 V 2 MHz
Low voltage main
mode
1.6 V EVDD0 5.5 V 2 MHz
1.8 V EVDD0 5.5 V 4 MHz
TO00 to TO07, TO10 to TO17
output frequency
fTO
Low-speed main
mode
1.6 V EV
DD0 < 1.8 V 2 MHz
4.0 V EVDD0 5.5 V 16 MHz
2.7 V EVDD0 < 4.0 V 8 MHz
1.8 V EVDD0 < 2.7 V 4 MHz
High-speed main
mode
1.6 V EV
DD0 < 1.8 V 2 MHz
1.8 V EVDD0 5.5 V 4 MHz Low voltage main
mode
1.6 V EV
DD0 < 1.8 V 2 MHz
1.8 V EVDD0 5.5 V 4 MHz
PCLBUZ0, PCLBUZ1 output
frequency
fPCL
Low-speed main
mode
1.6 V EV
DD0 < 1.8 V 2 MHz
INTP0 1.6 V VDD 5.5 V 1
μ
s Interrupt input high-level width,
low-level width
tINTH,
t
INTL
INTP1 to INTP11 1.6 V EV
DD0 5.5 V 1
μ
s
1.8 V EVDD0 5.5 V 250 ns Key interrupt input low-level width tKR KR0 to KR7
1.6 V EV
DD0 < 1.8 V 1
μ
s
RESET low-level width tRSL 10
μ
s
(Note and Remark are listed on the next page.)
<R>
<R>
<R>
<R>
<R>

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