Renesas RL78/G13

RL78/G13 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 539
Sep 22, 2011
12.2 Configuration of Serial Array Unit
The serial array unit includes the following hardware.
Table 12-1. Configuration of Serial Array Unit
Item Configuration
Shift register 8 bits or 9 bits
Note 1
Buffer register Lower 8 bits or 9 bits of serial data register mn (SDRmn)
Notes 1, 2
Serial clock I/O
SCK00, SCK01, SCK10, SCK11, SCK20, SCK21, SCK30, SCK31 pins (for 3-wire serial I/O),
SCL00, SCL01, SCL10, SCL11, SCL20, SCL21, SCL30, SCL31 pins (for simplified I
2
C)
Serial data input
SI00, SI01, SI10, SI11, SI20, SI21, SI30, SI31 pins (for 3-wire serial I/O), R
XD0, RxD1, RxD3
pins (for UART), R
XD2 pin (for UART supporting LIN-bus)
Serial data output
SO00, SO01, SO10, SO11, SO20, SO21, SO30, SO31 pins (for 3-wire serial I/O), T
XD0, TxD1,
TxD3 pins (for UART), T
XD2 pin (for UART supporting LIN-bus), output controller
Serial data I/O
SDA00, SDA01, SDA10, SDA11, SDA20, SDA21, SDA30, SDA31 pins (for simplified I
2
C)
<Registers of unit setting block>
• Peripheral enable register 0 (PER0)
• Serial clock select register m (SPSm)
• Serial channel enable status register m (SEm)
• Serial channel start register m (SSm)
• Serial channel stop register m (STm)
• Serial output enable register m (SOEm)
• Serial output register m (SOm)
• Serial output level register m (SOLm)
• Serial standby control register m (SSCm)
• Input switch control register (ISC)
• Noise filter enable register 0 (NFEN0)
<Registers of each channel>
• Serial data register mn (SDRmn)
• Serial mode register mn (SMRmn)
• Serial communication operation setting register mn (SCRmn)
• Serial status register mn (SSRmn)
• Serial flag clear trigger register mn (SIRmn)
Control registers
• Port input mode registers 0, 1, 4, 5, 8, 14 (PIM0, PIM1, PIM4, PIM5, PIM8, PIM14)
• Port output mode registers 0, 1, 4, 5, 7 to 9, 14 (POM0, POM1, POM4, POM5,
POM7 to POM9, POM14)
• Port mode registers 0, 1, 3 to 5, 7 to 9, 14 (PM0, PM1, PM3 to PM5, PM7 toPM9, PM14)
• Port registers 0, 1, 3 to 5, 7 to 9, 14 (P0, P1, P3 to P5, P7 to P9, P14)