Renesas RL78/G13

RL78/G13 CHAPTER 6 TIMER ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 416
Sep 22, 2011
Figure 6-66. Block Diagram of Operation as PWM Function
Interrupt signal
(INTTMmn)
Interrupt
controller
Clock selection
Trigger selection
Operation clock
CKm0
CKm1
TSmn
Interrupt signal
(INTTMmp)
Interrupt
controller
Clock selection
Trigger selection
Operation clock
CKm0
CKm1
TOmp pin
Output
controller
Master channel
(interval timer mode)
Slave channel
(one-count mode)
Timer counter
register mn (TCRmn)
Timer data
register mn (TDRmn)
Timer counter
register mp (TCRmp)
Timer data
register mp (TDRmp)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 2, 4, 6)
p: Slave channel number (n < p ≤ 7)