Renesas RL78/G13 - Page 495

RL78/G13 CHAPTER 11 A/D CONVERTER
R01UH0146EJ0100 Rev.1.00 476
Sep 22, 2011
Figure 11-1. Block Diagram of A/D Converter
INTAD
ADCS ADMD FR2 FR1 ADCEFR0
Sample & hold circuit
Temperature sensor
V
SS
A/D voltage comparator
A/D converter mode
register 0 (ADM0)
Internal bus
Internal bus
6
Analog input channel
specification register (ADS)
ANI16/P03/SI10/RxD1/SDA10
ANI17/P02/SO10/TxD1
ANI18/P147
ANI19/P120
ANI0/AV REFP /P20
ANI1/AV
REFM /P21
ANI2/P22
ANI3/P23
ANI4/P24
ANI5/P25
ANI6/P26
ANI7/P27
Controller
A/D conversion result
register (ADCR)
Conversion result
comparison upper limit
setting register (ADUL)
Conversion result
comparison lower limit
setting register (ADLL)
A/D conversion
result upper
limit/lower limit
comparator
Timer trigger signal (INTRTC)
Timer trigger signal (INTIT)
Comparison
voltage
generator
LV1 LV0
6
A/D port configuration
register (ADPC)
ADPC3 ADPC2 ADPC1 ADPC0
A/D test register
(ADTES)
ADTES1 ADTES0
4
2
ADS3ADS4 ADS2 ADS1 ADS0
ADISS
ADREFPMADREFP0 ADRCK AWC ADTYP
ADREFP1
Internal reference voltage (1.45 V)
V DD
AV REFP /ANI0/P20
AV REFM /ANI1/P21
V
SS
ADCS bit
ADREFP1 and ADREFP0 bits
ADTMD1 ADTMD0 ADTRS1 ADTRS0
A/D converter mode
register 1 (ADM1)
A/D converter mode
register 2 (ADM2)
Successive
approximation register
(SAR)
Internal reference voltage (1.45 V)
ADREFM bit
Selector
Selector
Selector
Selector
Selector
Analog/digital switcher
Timer trigger signal (INTTM01)
ADSCM
Remark Analog input pin for figure 11-1 when a 64-pin product is used.
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