RL78/G13 CHAPTER 22 SAFETY FUNCTIONS
R01UH0146EJ0100 Rev.1.00 913
Sep 22, 2011
<Control register>
• Invalid memory access detection control register (IAWCTL)
This register is used to control the detection of invalid memory access and RAM/SFR guard function.
IAWEN bit is used in invalid memory access detection function.
The IAWCTL register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 22-11. Format of Invalid Memory Access Detection Control Register (IAWCTL)
Address: F0078H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
IAWCTL IAWEN 0 GRAM1 GRAM0 0 GPORT GINT GCSC
IAWEN
Note
Control of invalid memory access detection
0 Disable the detection of invalid memory access.
1 Enable the detection of invalid memory access.
Remark By specifying WDTON = 1 for the option byte, the invalid memory access function is always enabled
regardless of the setting for the IAWEN bit. (For details, see CHAPTER 24 OPTION BYTE.)
Note Only writing 1 to the IAWEN bit is enabled, not writing 0 to it after setting it to 1.
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