Main SP Tables-5 (Controller)
SM Appendix 3-29 D255/D256/M281/M282
5-402-107 SDKJ7 Limit Setting CTL*
5-402-108 SDKJ8 Limit Setting CTL*
5-402-109 SDKJ9 Limit Setting CTL*
5-402-110 SDKJ10 Limit Setting CTL*
5-402-111 SDKJ11 Limit Setting CTL*
5-402-112 SDKJ12 Limit Setting CTL*
5-402-113 SDKJ13 Limit Setting CTL*
5-402-114 SDKJ14 Limit Setting CTL*
5-402-115 SDKJ15 Limit Setting CTL*
5-402-116 SDKJ16 Limit Setting CTL* [0 to 0xFF / 0 / 1 / step]
5-402-117 SDKJ17 Limit Setting CTL*
5-402-118 SDKJ18 Limit Setting CTL*
5-402-119 SDKJ19 Limit Setting CTL*
5-402-120 SDKJ20 Limit Setting CTL*
5-402-121 SDKJ21 Limit Setting CTL*
5-402-122 SDKJ22 Limit Setting CTL*
5-402-123 SDKJ23 Limit Setting CTL*
5-402-124 SDKJ24 Limit Setting CTL*
5-402-125 SDKJ25 Limit Setting CTL*
5-402-126 SDKJ26 Limit Setting CTL*
5-402-127 SDKJ27 Limit Setting CTL*
5-402-128 SDKJ28 Limit Setting CTL*
5-402-129 SDKJ29 Limit Setting CTL*
5-402-130 SDKJ30 Limit Setting CTL*