Program instructions
7.6 Counters
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
259
HSC counting mode support
● The compact models support a total of four HSC devices (HSC0, HSC1, HSC2, and
HSC3).
● The SR and ST models support a total of six HSC devices (HSC0, HSC1, HSC2, HSC3,
HSC4, and HSC5).
● HSC0, HSC2, HSC4, and HSC5 support eight counter modes (mode 0, 1, 3, 4, 6, 7, 9,
and 10).
● HSC1 and HSC3 support only one counter mode (mode 0).
Available HSC counter types
● Single-phase clock counter with internal direction control:
– Mode 0:
– Mode 1: with external reset
● Single-phase clock counter with external direction control:
– Mode 3:
– Mode 4: with external reset
● Two-phase clock counter with 2 clock inputs (clock-up and clock-down):
– Mode 6:
– Mode 7: with external reset
● AB quadrature phase counter:
– Mode 9:
– Mode 10: with external reset
● Before you use a high-speed counter, you must execute the HDEF instruction (High-
Speed Counter Definition) to select a counter mode. Use the first scan memory bit,
SM0.1 (this bit is ON for the first scan and OFF for subsequent scans) to execute HDEF
directly, or call a subroutine that contains the HDEF instruction.
● You can use all counter types with or without a reset input.
● When you activate the reset input, it clears the current value and holds it clear until you
deactivate the reset input.
Refer to the following sections for further information:
● High-speed counter programming (Page 264)
● High-speed counter summary (Page 260)
● Example initialization sequences for high-speed counters (Page 277)
● Noise reduction for high-speed inputs (Page 261)