Siemens SIMATIC S7 - CPU ST30, CPU SR30, and CPU Cr30 S; General Specifications and Features

Technical specifications
A.2 S7-200 SMART CPUs
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
695
A.2.2
CPU ST30, CPU SR30, and CPU CR30s
A.2.2.1
General specifications and features
General specifications and features of the CPU ST30, CPU SR30 and CPU CR30s
Table A- 23 General specifications
Technical data
CPU ST30 DC/DC/DC
CPU SR30 AC/DC/Relay
CPU CR30s AC/DC/Relay
Article number
6ES7288-1ST30-0AA0
6ES7288-1SR30-0AA0
6E88288-1CR30-0AA1
Dimensions W x H x D
(mm)
110 x 100 x 81 110 x 100 x 81 110 x 100 x 81
Weight
375 g
435 g
424 g
Power dissipation 12 W 14 W 7 w
Current available (EM
bus)
1400 mA max. (5 V DC) 1400 mA max. (5 V DC) Not available
Current available (24 V
DC)
300 mA max. (sensor power) 300 mA max. (sensor power) Not available
Digital input current
consumption (24 V DC)
4 mA/ input used 4 mA/ input used 4 mA/ input used
Table A- 24 CPU features
Technical data
CPU ST30 DC/DC/DC
CPU SR30 AC/DC/Relay
CPU CR30s AC/DC/Relay
User
memory
1
Program
18 Kbytes
18 Kbytes
12 Kbytes
User data (V)
12 Kbytes
12 Kbytes
8 Kbytes
Retentive
10 Kbytes max.
1
10 Kbytes max.
1
2 Kbytes max.
1
On-board digital I/O
18 inputs/12 outputs
18 inputs/12 outputs
18 inputs/12 outputs
Process image 256 bits of inputs (I) / 256 bits
of outputs (Q)
256 bits of inputs (I) / 256 bits
of outputs (Q)
256 bits of inputs (I) / 256 bits
of outputs (Q)
Analog image 56 words of inputs (AI) / 56
words of outputs (AQ)
56 words of inputs (AI) / 56
words of outputs (AQ)
Not available
Bit memory (M)
256 bits
256 bits
256 bits
Temporary (local) memory
(L)
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
64 bytes in the main program
and 64 bytes in
each subroutine and interrupt
routine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
Sequential control relays
(S)
256 bits 256 bits 256 bits
Expansion modules
expansion
6 6 Not available
Signal board expansion
1 max.
1 max.
Not available