Siemens SIMATIC S7 - Page 696

Technical specifications
A.2 S7-200 SMART CPUs
S7-200 SMART
696 System Manual, V2.3, 07/2017, A5E03822230-AF
Technical data
CPU ST30 DC/DC/DC
CPU SR30 AC/DC/Relay
CPU CR30s AC/DC/Relay
High-
speed
counters
Total
6
6
4
Single phase 5 at 200 kHz
1 at 30 kHz
5 at 200 kHz
1 at 30 kHz
4 at 100 kHz
A/B phase 3 at 100 kHz
1 at 20 kHz
3 at 100 kHz
1 at 20 kHz
2 at 50 kHz
Pulse outputs
2
3 at 100 kHz
--
Not available
Pulse catch inputs
12
12
Not available
Cyclic interrupts
2 at 1 ms resolution
2 at 1 ms resolution
2 at 1 ms resolution
Edge interrupts 4 rising and 4 falling (6 and 6
with optional signal board)
4 rising and 4 falling (6 and 6
with optional signal board)
4 rising and 4 falling
Memory card
microSDHC Card (optional)
microSDHC Card (optional)
Not available
Real time clock accuracy
+/- 120 seconds/month
+/- 120 seconds/month
Not available
Real time clock retention
time
7 days typ./6 days min. at 25
°C (maintenance-free Super
Capacitor)
7 days typ./6 days min. at 25
°C (maintenance-free Super
Capacitor)
Not available
1
You can configure areas of V memory, M memory, C memory (current values), and portions of T memory (current val-
ues on retentive times) to be retentive, up to the specified maximum amount.
2
The specified maximum pulse frequency is possible only for CPU models with transistor outputs. Pulse output operation
is not recommended for CPU models with relay outputs.
Table A- 25 Performance
Type of instruction
Execution speed
Boolean
150 ns instruction
Move Word
1.2 μs/instruction
Real math
3.6 μs/instruction
Table A- 26 User program elements supported
Element
Description
POUs Type/quantity Main program: 1
Subroutines: 128 (0 to 127)
Interrupt routines: 128 (0 to 127)
Nesting depth From main program: 8 subroutine levels
From interrupt routine: 4 subroutine levels
Accumulators Quantity 4
Timers Type/quantity Non-retentive (TON, TOF): 192
Retentive (TONR): 64
Counters
Quantity
256