Program instructions
7.6 Counters
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
261
Single phase / Dual phase maximum
clock / input rate
AB quadrature phase maximum
clock / input rate
HSC5 I1.0 I1.1 I1.3 S model CPUs:
• 30 kHz
S model CPUs
• 20 kHz = Maximum 1x count rate
• 80 kHz = Maximum 4x count rate
C model CPUs:
• n/a
C model CPUs:
• n/a
S model CPUs: SR20, ST20, SR30, ST30, SR40, ST40, SR60, and ST60
2
C model CPUs: CR20s, CR30s, CR40s, and CR60s
Noise reduction for high-speed inputs
Counting high-speed pulses with HSC inputs
Note
High-speed input wiring must use shielded cables
Use shielded c
able with a maximum length of 50 m, when connecting HSC input channels
I0.0, I0.1, I0.2, I0.3, I0.6. I0.7, I1.0, and I1.1.