Siemens SIMATIC S7 - Page 262

Program instructions
7.6 Counters
S7-200 SMART
262 System Manual, V2.3, 07/2017, A5E03822230-AF
One or both of the following actions may be necessary to correctly operate a high-speed
counter.
● Adjust the System Block digital input filter time of the input channels used by the HSC
channel. The S7-200 SMART CPU applies input filtering before the counting of pulses by
the HSC channel. This means that if an HSC input pulse occurs at a rate that is filtered
out by the input filtering, then the HSC does not detect any pulses on the input. You must
make sure that you configure the filter time of each input of the HSC to a value that
allows counting at the rate your application requires. This includes direction and reset
inputs. The following table shows the maximum input frequency that an HSC can detect
for each input filter configuration:
Input filter time
Maximum detectable frequency
0.2 μs 200 kHz (S model CPUs)
1
100 kHz (C model CPUs)
2
0.4 μs 200 kHz (S model CPUs)
100 kHz (C model CPUs)
0.8 μs 200 kHz (S model CPUs)
100 kHz (C model CPUs)
1.6 μs 200 kHz (S model CPUs)
100 kHz (C model CPUs)
3.2 μs 156 kHz (S model CPUs)
100 kHz (C model CPUs)
6.4 μs
78 kHz
12.8 μs
39 kHz
0.2 ms
2.5 kHz
0.4 ms
1.25 kHz
0.8 ms
625 Hz
1.6 ms
312 Hz
3.2 ms
156 Hz
6.4 ms
78 Hz
12.8 ms
39 Hz
1
S model CPUs: SR20, ST20, SR30, ST30, SR40, ST40, SR60, ST60
2
C model CPUs: CR20s, CR30s, CR40s, and CR60s