Siemens SIMATIC S7 - Page 686

Technical specifications
A.2 S7-200 SMART CPUs
S7-200 SMART
686 System Manual, V2.3, 07/2017, A5E03822230-AF
Table A- 9 CPU features
Technical data
CPU ST20 DC/DC/DC
CPU SR20 AC/DC/Relay
CPU CR20s AC/DC/Relay
User
memory
1
Program
12 Kbytes
12 Kbytes
12 Kbytes
User data (V) 8 Kbytes 8 Kbytes 8 Kbytes
Retentive
10 Kbytes max.
1
10 Kbytes max.
1
2 Kbytes max.
1
On-board digital I/O 12 inputs/8 outputs 12 inputs/8 outputs 12 inputs/8 outputs
Process image 256 bits of inputs (I) / 256 bits
of outputs (Q)
256 bits of inputs (I) / 256 bits
of outputs (Q)
256 bits of inputs (I) / 256 bits
of outputs (Q)
Analog image 56 words of inputs (AI) / 56
words of outputs (AQ)
56 words of inputs (AI) / 56
words of outputs (AQ)
Not available
Bit memory (M)
256 bits
256 bits
256 bits
Temporary (local) memory
(L)
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
64 bytes in the main program
and 64 bytes in each
subroutine and interrupt rou-
tine
60 bytes when programming
in LAD or FBD (STEP 7-
Micro/WIN reserves 4 bytes)
Sequential control relays
(S)
256 bits 256 bits 256 bits
Expansion modules
expansion
6 6 Not available
Signal board expansion
1 max.
1 max.
Not available
High-
speed
counters
Total
6
6
4
Single phase 4 at 200 kHz
2 at 30 kHz
4 at 200 kHz
2 at 30 kHz
4 at 100 kHz
A/B phase 2 at 100 Khz
2 at 20 kHz
2 at 100 Khz
2 at 20 kHz
2 at 50 kHz
Pulse outputs
2
2 at 100 kHz
2
2 at 100 kHz
2
Not available
Pulse catch inputs
12
12
Not available
Cyclic interrupts
2 at 1 ms resolution
2 at 1 ms resolution
2 at 1 ms resolution
Edge interrupts 4 rising and 4 falling (6 and 6
with optional signal board)
4 rising and 4 falling (6 and 6
with optional signal board)
4 rising and 4 falling
Memory card
microSDHC Card (optional)
microSDHC Card (optional)
Not available
Real time clock accuracy
+/- 120 seconds/month
+/- 120 seconds/month
Not available
Real time clock retention
time
7 days typ./6 days min. at 25
°C (maintenance-free Super
Capacitor)
7 days typ./6 days min. at 25
°C (maintenance-free Super
Capacitor)
Not available
1
You can configure areas of V memory, M memory, C memory (current values), and portions of T memory (current val-
ues on retentive times) to be retentive, up to the specified maximum amount.
2
The specified maximum pulse frequency is possible only for CPU models with transistor outputs. Pulse output operation
is not recommended for CPU models with relay outputs.