Special memory (SM) and system symbol names
D.14 SMB36-SMB45 (HSC0), SMB46-SMB55 (HSC1), SMB56-SM65 (HSC2), SMB136-SMB145 (HSC3), SMB146-
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
815
Table D- 14 HSC5 configuration and operation
: Counter status bits are valid only while the CPU is executing an inter-
rupt routine that a high-speed counter event triggered.
SM156.0–
Reserved
HSC5 current counting direction status bit: TRUE: Counting up
HSC5_Status_6 SM156.6 HSC5 current value equals preset value status bit: TRUE: Equal
HSC5_Status_7 SM156.7 HSC5 current value is greater than preset value status bit: TRUE: Greater
HSC5_Reset_Level SM157.0 HSC5 active level control bit for Reset: FALSE: Reset is active high, TRUE:
HSC5_Rate SM157.2 HSC5 Counting rate selection for Quadrature counters: FALSE: 4x counting
rate; TRUE: 1x counting rate
HSC5 direction control bit: TRUE: Count up
HSC5 update direction: TRUE: Update direction
HSC5 update preset value: TRUE: Write new preset value to HSC5 preset
HSC5_CV_Update SM157.6 HSC5 update current value: TRUE: Write new current value to HSC5 cur-
HSC5 enable bit: TRUE: Enable
You use SMD158 to set HSC5 current value to any value you choose. To
update the current value, write the new current value to SMD158; write 1 to
SM157.6; and execute the HSC instruction. The instruction then writes the
new current value to HSC5's current count register.
You use SMD162 to set HSC5 preset value to any value you choose. To
update the preset value, write the new preset value to SMD162; write 1 to
SM157.5; and execute the HSC instruction. The instruction then writes the
new preset value to HSC5's preset register.
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