ST ST32M103 Series - Figure 75. Counter Timing Diagram, Internal Clock Divided by 1; Figure 76. Counter Timing Diagram, Internal Clock Divided by 2; Figure 77. Counter Timing Diagram, Internal Clock Divided by 4

UM0306 General purpose timer (TIMx)
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Figure 75. Counter timing diagram, internal clock divided by 1
Figure 76. Counter timing diagram, internal clock divided by 2
Figure 77. Counter timing diagram, internal clock divided by 4
CK_INT
00
CNT_EN
TIMER CLOCK = CK_CNT
COUNTER REGISTER
UPDATE INTERRUPT FLAG (UIF)
COUNTER OVERFLOW
UPDATE EVENT (UEV)
01 02 03 04 05 06 0732 33 34 35 3631
CK_INT
0035 0000 0001 0002 0003
CNT_EN
TIMER CLOCK = CK_CNT
COUNTER REGISTER
UPDATE INTERRUPT FLAG (UIF)
0034
0036
COUNTER OVERFLOW
UPDATE EVENT (UEV)
0000 0001
CNT_EN
TIMER CLOCK = CK_CNT
COUNTER REGISTER
UPDATE INTERRUPT FLAG (UIF)
0035
0036
COUNTER OVERFLOW
UPDATE EVENT (UEV)
CK_INT
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