ST ST32M103 Series - Page 375

UM0306 Serial peripheral interface (SPI)
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16.4.7 SPI Tx CRC register (SPI_TXCRCR)
Address Offset: 18h
Reset Value: 0000 0000 (0000h)
Bits 15:0
RXCRC[15:0]: Rx CRC Register
When CRC calculation is enabled, the RxCRC[15:0] bits contain the
computed CRC value of the subsequently received bytes. This register is
reset when the CRCEN bit in SPI_CR1 register is written to 1. The CRC is
calculated serially using the polynomial programmed in the SPI_CRCPR
register.
Only the 8 LSB bits are considered when the data frame format is set to be
8-bit data (DFF bit of SPI_CR1 is cleared). CRC calculation is done based
on CRC8.
The entire 16-bits of this register are considered when a 16-bit data frame
format is selected (DFF bit of the SPI_CR1 register is set). CRC calculation
is done based on CRC16 - CCITT standard.
Note: A read to this register when the BSY Flag is set could return an incorrect
value.
1514131211109876543210
TxCRC[15:0]
rrrrrrrrrrrrrrrr
Bits 15:0
TxCRC[15:0]: Tx CRC register
When CRC calculation is enabled, the TxCRC[7:0] bits contain the
computed CRC value of the subsequently transmitted bytes. This register
is reset when the CRCEN bit of SPI_CR1 is written to 1. The CRC is
calculated serially using the polynomial programmed in the SPI_CRCPR
register.
Only the 8 LSB bits are considered when the data frame format is set to be
8-bit data (DFF bit of SPI_CR1 is cleared). CRC calculation is done based
on CRC8.
The entire 16-bits of this register are considered when a 16-bit data frame
format is selected (DFF bit of the SPI_CR1 register is set). CRC
calculation is done based on CRC16 - CCITT standard.
Note: A read to this register when the BSY flag is set could return a incorrect
value
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