ST ST32M103 Series - Page 477

UM0306 Analog/digital converter (ADC)
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19.13.4 ADC sample time register 1 (ADC_SMPR1)
Address offset: 0Ch
Reset value: 0000 0000h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved SMP18[2:0] SMP17[2:0] SMP16[2:0] SMP15[2:1]
rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
SMP
15_0
SMP14[2:0] SMP13[2:0] SMP12[2:0] SMP11[2:0] SMP10[2:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:27 Reserved, must be kept cleared.
Bits 26:0
SMPx[2:0]: Channel x Sample time selection
These bits are written by software to select the sample time individually for
each channel. During sample cycles channel selection bits must remain
unchanged.
000: 1.5 cycles
001: 7.5 cycles
010: 13.5 cycles
011: 28.5 cycles
100: 41.5 cycles
101: 55.5 cycles
110: 71.5 cycles
111: 239.5 cycles
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