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ST ST32M103 Series User Manual

ST ST32M103 Series
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Debug support (DBG) UM0306
510/519
Note: Refer to the ARM CoreSight Architecture Specification v1.0 (ARM IHI 0029B) for further
information
Use of the formatter for STM32F10x MCU
For STM32F10x MCU, there is only one TRACE source (the ITM). But the formatter can not
be disabled and must be used in bypass mode because the TRACECTL pin is not assigned.
This way, the Trace Port Analyzer can decode part of the formatter protocol to determine the
position of the trigger.
20.16.4 TPUI frame synchronization packets
The TPUI can generate two types of synchronization packets:
The Frame Synchronization packet (or Full Word Synchronization packet)
It consists of the word: 0x7F_FF_FF_FF (LSB emitted first). This sequence can not
occur at any other time provided that the ID source code 0x7F has not been used.
It is output periodically between frames.
In continuous mode, the TPA must discard all these frames once a synchronization
frame has been found.
The Half-Word Synchronization packet
It consists of the half word: 0x7F_FF (LSB emitted first).
It is output periodically between or within frames.
These packets are only generated in continuous mode and enable the TPA to detect
that the TRACE port is in IDLE mode (no TRACE to be captured). When detected by
the TPA, it must be discarded.
20.16.5 Emission of synchronization frame packet
There is no Synchronization Counter register implemented in the TPIU of the core.
Consequently, the synchronization trigger can only be generated by the DWT. Refer to the
registers DWT Control Register (bits SYNCTAP[11:10]) and the DWT Current PC Sampler
Cycle Count Register.
The TPUI Frame synchronization packet (0x7F_FF_FF_FF) is emitted:
after each TPIU reset release. This reset is synchronously released with the rising
edge of TRACECLKIN clock. This means that this packet is emitted once the bit
IO_TRACEN of the DBGMCU_CFG register has been set. In this case, the word
0x7F_FF_FF_FF is not followed by any formatted packet.
at each DWT trigger (assuming DWT has been previously configured). Two cases
occur:
If the bit SYNENA of the ITM is reset, only the word 0x7F_FF_FF_FF is emitted
without any formatted stream which follows.
If the bit SYNENA of the ITM is set, then the ITM synchronization packets will
follow (0x80_00_00_00_00_00), formatted by the TPUI (trace source ID added).
20.16.6 Synchronous mode
The trace data output size can be configured to 4, 2 or 1 pin: TRACED(3:0)
The output clock is output to the debugger (TRACECK)
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ST ST32M103 Series Specifications

General IconGeneral
BrandST
ModelST32M103 Series
CategoryMicrocontrollers
LanguageEnglish

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