Table 12-1. Standard Commands (continued)
Name
Register Code
(LSB/MSB)
Description
AveragePower AP 0x22/0x23
This read-only function returns a signed integer value of average power during battery charging and discharging.
It is negative during discharge and positive during charge. A value of 0 indicates that the battery is not being
discharged. The value is reported in units of mW.
InternalTemperature INT_TEMP 0x28/0x29
This read-only function returns an unsigned integer value of the measured internal temperature of the device in
0.1-k units measured by the gas gauge.
CycleCount CC 0x2A/0x2B
This read-only function returns an unsigned integer value of the number of cycles the battery has experienced
a discharge (range 0 to 65535). One cycle occurs when accumulated discharge greater than or equal to CC
threshold.
RelativeStateOfCharge SOC 0x2C/0x2D
This read-only function returns an unsigned integer value of the predicted remaining battery capacity expressed
as percentage of FullChargeCapacity() with a range of 0% to 100%.
StateOfHealth SOH 0x2E/0x2F
This read-only function returns an unsigned integer value expressed as a percentage of the ratio of predicted
FCC (25C SoH Load Rate) over the DesignCapacity(). The range is 0x00 to 0x64 for 0% to 100%, respectively.
ChargeVoltage CV 0x30/0x31 Returns the desired charging voltage in mV to the charger
ChargeCurrent CC 0x32/0x33 Returns the desired charging current in mA to the charger
DesignCapacity 0x3C/0x3D
In SEALED and UNSEALED access: This command returns the value stored in Design Capacity and is
expressed in mAh. This is intended to be a theoretical or nominal capacity of a new pack, but should have
no bearing on the operation of the gas gauge functionality.
MACSubcmd 0x3E/0x3F MAC Data block command
MACData 0x40/0x5F MAC Data block
MACDataSum 0x60 MAC Data block checksum
MACDataLen 0x61 MAC Data block length
12.1.1 0x00/01 ManufacturerAccess() and ControlStatus()
A write to this register is identical to writing to MACSubcmd() . For a description of MAC subcommands, see
Section 12.2.
A read on this register returns the Control bits.
This Control Register is an I
2
C register, and the control bits are read back on register 0x00/0x01. These control
bits are provided for backward compatibility and ease-of-use.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD SEC1 SEC0
AUTH
CALM
RSVD RSVD
Check
Sum
Valid
RSVD RSVD RSVD RSVD RSVD LDMD R_DIS VOK QMax
RSVD (Bit 15): Reserved
SEC1, SEC0 (Bits 14, 13): SECURITY mode
0, 0 = Reserved
0, 1 = Full Access
1, 0 = Unsealed
1, 1 = Sealed
AUTHCALM (Bit 12): Automatic CALIBRATION mode
1 = Enabled
0 = Disabled
RSVD (Bits 11–10): Reserved
CheckSumValid (Bit 9): Checksum is valid.
1 = Flash Writes are enabled.
0 = Flash Writes are disabled due to low voltage or PF condition.
RSVD (Bit 8–7): Reserved
RSVD (Bits 6–4): Reserved
I2C Commands www.ti.com
66 BQ28Z610-R2 SLUUCO0 – APRIL 2022
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