2.
SYSTEM
ORGANIZATION
The elements
of
this computer system
include
a basic
processor
(BP),
input/output
processors (lOPs), memory,
I/o
device
controllers,
and
devices
(see Figure 1). The
pro-
cessors and
interfaces
clustered
into
functional
groups,
in-
terconnected
via
buses
and
controlled
from
a Configuration
Control Panel
and
a System Control Processor. Elements
within
a processor
cluster
share
an
access
path
for
intra-
cluster
communications. Thus,
the
total computer system
can
be
viewed
functionally
as a group
of
program-controlled
processor clusters communicating with
each
other
and
a
common memory. Each processor
cluster
operates
asyn-
chronously
and
semi-independently,
automatically
over-
lapping
the operation
of
elements
within
as well as the
operation
of
other
processor clusters for
greater
speed
(when
circumstances
permit).
PROCESSOR
CLUSTERS
Processors (basic processor
and
MIOP, for
example)
are
grouped
functionally
along
with a Memory
Interface
(MI)
and
a Processor
Interface
(PI)
into
a processor
cluster.
El-
ements
within
a processor
cluster
share
an
access
path
(the
cluster
bus) to
the
Memory
Interface,
which
connects
to
the
memory system
via
a memory bus. The Memory
Interface
resolves
contention
problems
and
controls use
of
the
cluster
bus by
the
elements
in
the
cluster.
A processor communicates with processors in
other
processor
clusters through
the Processor
Interface,
which
connects
di-
rectly
to a processor bus. Via the processor bus,
any
pro-
cessor
can
communicate
with
or control
any
other
processor
anywhere
in
the
system
configuration.
Note:
Although two processor buses
are
provided, a Pro-
cessor
Interface
can
be
connected
to
one
or
the
other
of
the
processor buses,
but
not to both
at
the
same
time.
Within a
basic
processor-MIOP processor
cluster,
the
basic
processor primari
Iy
performs overa
II
contro I
and
data
reduc-
tion tasks
whereas
the MIOP performs the task
associated
with
the
exchange
of
digital
information
between
main
memory
and
selected
peripheral
devices.
The MIOP
com-
municates with
device
controllers via the
I/o
bus, which
connects
to the
Controller
Interface
(CI).
SYSTEM
CONTROL
PROCESSOR
The System Control Processor performs these primary
func-
tions in
the
overall
system:
1
• System
control.
2.
External Control Subsystem.
8
System
Organization
3.
Internal
and
external
interrupt
processing.
4.
External
and
certain
internal
direct
I/o
(DIO)
control.
It
provides these major interfaces with
other
parts of the
system:
1.
System console
interface.
2.
System contro I bus
interface.
3.
Processor bus
interface.
4.
Interna I
and
externa
I interrupt
interfaces.
5.
External
and
certain
interna I DIO
interfaces.
6.
System
clock
interface.
In
addition
to
these
major
interfaces
it provides paths for
other
signals including system
reset,
1.024
MHz
clock,
power
on/power
off
trap requests,
and
external
real-time
clocks.
Figure 1 shows
the
interconnection
of
a System Control Pro-
cessor to processor
clusters via a processor bus as well as
in-
terconnection
to
the
system
console,
external
Direct
Input/
Output
(DIO),
and
external
interrupts.
BASIC
PROCESSOR
This
section
describes the
organization
and
operation
of
the
basic
processor in terms of instruction
and
data
formats,
in-
formation processing,
and
program
control.
The
basic
pro-
cessor comprises a fast memory
and
an
arithmetic
and control
unit
as
functionally
shown in Figure
2.
Note:
Functionally
associated
with the
basic
processor
bUT
physically
located
elsewhere
are
a memory map,
memory
access
protection
codes,
and
memory
write
protection
codes.
Memory control storage for the
memory map
and
access
codes
is
located
in
the
Mem-
ory
Interface,
and
the memory control storage for
the
write
protection
codes (write locks)
is
located
in
the
memory. These functions
are
described in
"Memory System",
later
in this
chapter.
GENERAL
REGISTERS
A fast
(integrated
circuit)
memory consisting
of
ninety-six
32-bit
registers
is
used within
the
basic processor. A group
of
24 registers
is
referred to as a register
block;
thus, a
basic processor contains four register
blocks.
A
2-bit
con-
trol field
(called
a register
block
pointer) in the program
status words
(PSWs)
selects
the register
block
currently
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