Xerox 560

Table 5. Registers Changed at Time of a Trap Due to an Operand Access (cont.)
Instructions
Changes
MBS, CBS, TBS, TTBS, EBS, MMC Registers and memory may be changed and the Register Altered
DA, DS, DL, DST, DC, DM, DD, PACK, bit set.
UNPK, LM, STM, PLM, PSM, STD
CVA, CVS
If a trap occurs, the instruction will be aborted before altering
registers.
CCl-4 may be changed but not used as input to any
of these instructions.
XPSD, LPSD, PSS, PLS If a trap occurs due to storing the old PSWs or fetching the
new PSWs, the instruction is aborted before changing the old
PSWs.
SIO, no, TDV, HIO, Ala, RIO If trap occurs, the instruction will be aborted without altering
condition codes, registers, or memory.
*ANLZ An indirect ANALYZE instruction executed in the master-
protected mode wi II trap.
No registers are altered.
46 Trap System