Xerox 560

Instruction in memory:
Instruction in instruction register:
Indi
rect reference addresses:
Contents
of indirect reference address:
Address used if
bit 0 = 1:
Displacement
aligned for halfword indexing:
Final
effective address:
II
Ir]-o -]]-1-]2-]-3 -]4"']: .... ::-6 -:-]:-]-:I-:-2-
f
]-:-2 -:3-1-::-4-~-5 -:-2-:-1:-8 -~9-:o--':,lo
0
Figure 9. Generation of Effective Virtual Address (Indirect Real-Extended Addressing)
These
are the register formats for byte-string instructions:
Byte-string
instruction:
Register R:
24 Main Memory
20-bit signed disp acement,
sign extended before use
Register Rul:
During
real-extended addressing memory write protection
is invoked.
Table 1 summarizes the addressing characteristics.