1.
XEROX
560
COMPUTER
SYSTEM
INTRODUCTION
The Xerox 560
general-purpose,
digital,
computer system
accommodates a
variety
of
scientific,
business,
real-time,
and ti me-shar i
ng
app I i
cat
ions. A system inc I udes system
control,
basic processor,
I/O
processor, and main memory
(up
to
256K words) with two ports. Each major system
element
performs asynchronously with respect
to
other
elements.
The basic system
can
be readi
Iy
expanded.
Memory
access
paths
can
be increased from
the
basic two ports
to
a
maxi-
mum
of six ports.
Input/output
capability
can
be increased
by adding more
input/output
processors (lOPs),
device
con-
trollers, and peripheral
devices.
The basic processor
(BP)
has
an
extensi
ve
i nstructi on
set
that
includes
floating-point,
byte-string,
and decimal
instruct ions.
The multiaccess memory units, with
interleaving,
afford a
high level of system performance. Main memory
can
be
expanded in
16K
word increments to a maximum of 256K
words. Address
interleaving
may be performed between
memory units of like
size.
The number of ports
to
each
memory unit
can
be expanded
to
allow
independent
ac-
cess
to
memory
by
up to six
II
processor clusters" (i.
e.
,
functional groups).
Processor clusters
are
the
grouping of two or more functions
(such as a basic processor,
an
I/O
processor, and
inter-
faces) on a common bus. Clustering permits processors
to
share common faci I iti es,
e.
g.,
buses and memory
inter-
faces. Therefore,
the
hardware is I ess
redundant,
hence
less complex, resulting in more
reliability
at
a lower cost.
There
are
multiple combinations of functional groups from
which
to
select.
Existing Sigma
5-9
programs may be run on the system. The
upward
compatibility
of the comprehensive, modular
soft-
ware (assemblers, compi lers, mathematical and uti lity
rou-
tines,
and
application
packages)
eliminates
reprogramming.
Features
have
been incorporated in this design
to
enhance
overall system
reliability,
maintainability,
and
availability.
Centralized
switches for system
repartitioning
may permit
faulty units, or
an
entire
subsystem,
to
be isolated for
diag-
nosis or
repair
while
the primary system continues operation.
Parity
checking
is
performed on
each
byte of information
for most system interfaces and internal control signals. Most
fai led instructions
are
automatically
retried,
and
uninter-
rupted processing continues. The only
apparent
effect
may
be
an
entry in
the
error log. In
the
event
an
error is
irre-
c overabl
e,
there
are
error storage reg i sters
that
return
com-
plete
data
on the
fault
and
the
status of the system
at
that
point.
GENERAL
CHARACTERISTICS
The following system
features
and
characteristics
permit
efficient
operation in
general-purpose,
multiprocessor,
time-sharing,
real-time,
and multiuse environments:
•
Word-oriented
memory
(32-bit
word plus
parity
bit
per byte)
that
can
be addressed and
altered
as
byte
(8-bit),
halfword
(2-byte),
word
(4-byte),
and
double-
word (8-byte)
quantities.
•
•
•
•
•
•
•
•
•
Memory
expandable
to
256K words
(K
= 1024) in mod-
ular units of
16K
words
each.
Indirect
addressing with or
without
postindexing.
Displacement
index
registers,
automatically
self-
adjusting for
all
data
sizes.
Immediate operand instructions for
greater
storage
efficiency
and
increased speed.
Four blocks of
16
general-purpose
registers for
address-
ing, indexing,
and
accumulating.
Multiple
registers
permit rapid
context
switching.
Hardware memory mapping, which
virtually
eliminates
memory fragmentation
and
provides dynamic program
relocation.
AA
____
...
______
___
J..
__
L~
__
L
__
_
~
~_L
___
___
.-.I
!
__
r
______
L~
__
_
n
....
II.v.,
............
"'=
!-'.V."'
....
IIVII
'VI
;'1;""""
,",II,",
II11V111,UIIUII
securi ty and protecti on.
Memory write
protection
within memory units
to
prevent
inadvertent
destruction of
critical
areas
of memory from
any
processor
cluster.
Watchdog timer to assure nonstop operation.
Real-time priority
interrupt
system with
automatic
iden-
tification
and
priority assignment, fast response
time,
and
14
internal and up to
48
external levels
that
can
be
individually
armed,
enabled,
and triggered by
program
control.
• Instructions with long
execution
times
can
be
interrupted.
• Automatic traps for error or
fault
conditions, with
masking
capability
and maximum
recoverability,
under
program
control.
• Power
fail-safe
for
automatic
shutdown and resumption
of processing in
event
of power fai lure.
•
Multiple
interval timers with a
choice
of resolutions
for independent ti
me
bases.
• Privileged instruction logic for program integrity in
multiuse environments.
Xerox 560 Computer System
To Next Page
Loading...
Need help?
General
