Xerox 560

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'xerox Corporation

/701

South Aviation Boulevard

lEI

Segundo, California 90245

_213679-4511

XEROX

Xerox

560

Computer

Reierence

iVianuai

FIRST

EDITION

90 30 76A

January

1974

Price:

$7.25

Printed in

U.S.A.

Main Page

Table of Contents4
Xerox 560 Computer System7
- Introduction7
- General Characteristics7
Status Word7
- Standard and Optional Features9
- General-Purpose Features9
- Time-Sharing Features10
- Real-Time Features11
- Multiuse Features12
- Multiprocessor Features12
System Organization14
- Processor Clusters14
- System Control Processor14
- Basic Processor14
  - General Registers14
- A Xerox 560 Computer System15
- The Basic Processor16
- Main Memory20
Main Memory21
- Maintainability and Performance22
- Virtual and Real Memory23
Addressing Logic24
- Types of Addressing25
- Generation of Actual Addresses Indirect, Virtual Addressing28
Index Displacement Alignment29
Generation of Effective Virtual Address (Indirect Real-Extended Addressing)30
- Memory Address Control32
- Program Status Words34
- Centralized Interrupts36
  - States of an Interrupt Level36
Operational States of an Interrupt Level37
- Dialogue between the Basic Processor and the Interrupt System During an38
- Dialogue During an Interrupt-Exiting Sequence38
- Physical Organization38
- Interrupt Groups38
Interrupt Locations39
1L. Interrupt Priority Chain40
- Control of the Interrupt System41
- Sing I E- Instruct I on Interrupts42
- Trap System42
  - Trap Entry Sequence42
  - Trap Addressing42
- Summary of Trap Locations43
- Hardware Error Trap49
- Instruction Exception Trap50
- Power on Trap50
- Power off Trap50
- Processor Detected Fault Flag50
TCC Setting for Instruction Exception50
- Register Altered Bit51
Registers Changed at Time of a Trap Due to an Operand Access52
Instruction Repertoire53
Load/Store Instructions55
Analyze/Interpret Instructions63
ANALYZE Table for Operation Codes63
Fixed-Point Arithmetic Instructions65
Comparison Instructions72
Logical Instructions75
Shift Instructions76
- Floating-Point Shift78
Conversion Instructions79
Floating-Point Arithmetic Instructions80
- Floating-Point Numbers81
- Floating-Point Add and Subtract82
Floating-Point Number Representation82
- Floating-Point Multiply and Divide84
- Condition Codes for Floating-Point Instructions84
Condition Code Settings for Floating-Point85
Decimal Instructions86
- Packed Decima I Numbers87
- Zoned Decimal Numbers87
- Decimal Accumulator87
- Decimai Instruction Format ~I87
- Illegal Digit and Sign Detection87
- Overflow Detection88
- Decimal Instruction Nomenclature88
- Condition Code Settings88
Byte-String Instructions92
Push-Down Instructions (Non-Privileged)102
- Stack Pointer Doubleword (SPD)102
- Push-Down Condition Code Settings103
Push-Down Instructions (Privileged)107
- Status Stack Pointer Doubleword107
Typical 28-Word Portion of Memory Stack108
Execute/Branch Instructions112
- Nonallowed Operation Trap During Execution of Branch Instruction112
Call Instructions115
Control Instructions115
- Loading the Memory Map120
- Memory Write Protection Locks122
- Interruption of MMC123
- Memory Access Traps by MMC Instruction123
- Read Direct, Internal Basic Processor126
  - Control (Mode 0)126
- Read Direct, Interrupt Control (Mode 1)127
- Write Direct, Internal Basic Processor128
  - Control (Mode 0)128
- Read Direct (Mode 9)129
Read Direct Mode 9 Status Word129
Chassis Type Assignments130
Input/Output Instructions133
- Overa" Characteristics133
- I/Ostatus Information133
Description of I/O Instructions134
Formats of I/O Instructions134
I/O Status Information (Register R)136
Operational Status Byte (Register Ru1)138
Status Response Bits for139
I/O Instructions139
Lop Status Byte140
- Status Response Bits for AIO Instruction141
I/O Address (AIO Response)141
Input/Output Operati Ons148
- External DIO Interface148
- Multiplexor Input/Output Processor (MIOP)148
  - Device Controllers148
- Rotating Memory Processor (RMP)149
- Input/Output Processor (Lop) Fundamentals149
- I/O Operation Phases154
Operational Control158
- Externa I Control Subsystem158
  - Centralized System Control158
  - Control Console Devices158
- Control Commands159
  - Operator Control Commands159
Event Messages159
Bootstrap Loader161
- Diagnostic Control Commands162
Instructions163
Diagnostic Control (P-Mode) Commands163
- Maintenance Control Commands164
- System Control Panel167
System Control Panel168
- Operating Procedures and Information170
Bit Assignments and Description, Processor Control Word, Register Q30 (X'1 E')171
Bit Assignments, Address Compare172
System Configuration Control173
- Configuration Control Panel (CCP)173
Chassis Physical Configuration174
Sample Rows of CCP Switches174
Functions of Memory Unit Configuration Control Panel Row176
Referenc E Tables179
- Standard Symbols and Codes179
- Standard Character Sets179
- Control Codes179
- Special Code Properties179
  - Table of Powers of Ten16179
- Standard 8-Bit Computer Codes (EBCDIC)180
- Standard 7 -Bit Communication Codes (Anscii) 1180
- Standard Symbol-Code Correspondences181
- Hexadecimal Arithmetic185
- Hexadecimal-Decimal Integer Conversion188
- Hexadecimal-Decimal Fraction Conversion Table193
- Table of Powers of Two197
- Mathematica I Constants197
Glossary of Symbolic Terms198
Fault Status Registers201
- C-L. Fault Status Registers201
C-2. Memory Unit Status Register202

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