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Xerox 560

Xerox 560
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Condition
code
settings:
2 3 4
Result in R
0
0
Zero
0
Negative
0
Positive
LD
LOAD DOUBLEWORD
(Doubleword
index
alignment)
LOAD DOUBLEWORD loads the
32
low-order
bits
of
the
effective
doubleword into
register
Ru1
and
then
loads
the
32
high-order
bits
of
the
effective
doubleword
into
register
R.
If R is
an
odd
value,
the
result in
register
R is
the
32
high-
order
bits
of
the
effective
doubleword. The
condition
code
settings
are
based on
the
effective
doubleword,
rather
than
the
final
result
in
register
R (see
example
3,
below).
Affected:
(R),
(Ru1),
CC3,
CC4
ED
32
_
63
Ru1;
ED
O
_
31
R
Condition
code
settings:
234
o 0
Zero
- 0
Negative
o Positive
Example
1,
even
R field
value:
Before
execution
After
execution
ED
X
'
0123456789ABCDEF' X
'
0123456789ABCDEF'
(R)
xxxxxxxx X I 0 1234567
1
(Ru1)
= xxxxxxxx X
'
89ABCDEF'
CC
xxxx xxlO
Example 2, odd R
field
value:
Before
execution
After
execution
ED
X
'
0123456789ABCDEF' X
'
0123456789ABCDEF'
(R)
xxxxxxxx X
'
01234567
1
CC
xxxx xx
10
Example
3,
odd R
field
value:
Before
execution
After
execution
ED
X 100000000 1 2345678
1
XI 00000000 1 2345678
1
(R)
xxxxxxxx
XI 00000000 I
CC
xxxx
xx
10
LCH
LOAD COMPLEMENT HALFWORD
(Halfword
index
alignment)
LOAD COMPLEMENT HALFWORD
extends
the
sign
of
the
effective
halfword 16
bit
positions to
the
left
and then loads
the
32-bit
twols complement
of
the
result
into
register
R.
(Overflow
cannot
occur.
)
Affected:
(R),
CC3,
CC4
{EHSEJ-R
Condition
code
settings:
2 3 4 Result in R
-
0 0
Zero
- 0
Negative
o Positive
LAH
LOAD
ABSOLUTE
HALFWORD
(Halfword
index
alignment)
If
the
effective
halfword is
positive,
LOAD
ABSOLUTE
HALFWORD
extends
the
sign
of
the
effective
halfword
16
bit
positions to the
left
and then loads the
32-bit
result
in
register
R.
If
the
effective
halfword is
negative,
LAH
extends
the
sign
of
the
effective
halfword
16
bit
positions
to
the
left
and then loads
the
32-bit
twols complement
of
the
result
into
register
R.
(Overflow
cannot
occur.)
Affected:
(R),
CC3,
CC4
EHSE
- R
Condition
code
settings:
2 3 4 Result in R
o 0 Zero
o
Nonzero
Load/Store Instructi ons 51

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