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Xilinx ChipScope Pro User Manual

Xilinx ChipScope Pro
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204 www.xilinx.com ChipScope Pro Software and Cores User Guide
UG029 (v14.3) October 16, 2012
Chapter 5: ChipScope Engine Tcl Interface
::chipscope::csevio_read_values
Reads values from the specified signal/bus of the target VIO core.
Syntax
::chipscope::csevio_read_values handle [list deviceIndex userRegNumber
coreIndex] inputTclArray
Arguments
Returns
An exception is thrown if the command fails.
Example
Assumptions for this example:
coreRef has already been set to the VIO core.
A signal called “status” is defined as a bit in the SYNC_INPUT port.
A bus called “data_bus” is defined as an 8-bit bus in the ASYNC_INPUT port.
1. Get the values of “status” and “data_bus” and print them to stdout
%csevio_read_values $handle $coreRef inputTclArray
Table 5-70: Arguments for Subcommand ::chipscope::csevio_read_values
Argument Type Description
handle
Required
Handle to the session that is returned by
::chipscope::csejtag_session create
[list
deviceIndex
userRegNumber
coreIndex]
A list containing three elements:
Device index (0 to n-1) in the n-length JTAG chain
BSCAN block USER register number (starting with 1)
Index for core unit. First core unit connected to ICON has
index 0.
inputTclArray Name of a Tcl array. The index into the array is the name of
an input signal or bus defined by
csevio_define_signal or csevio_define_bus,
respectively. Special postfixes can be used to specify various
states of the input signal or buses:
“.value” specifies the signal/bus value (same as no
postfix)
“.activity_up” specifies asynchronous low-to-high
activity
“.activity_down” specifies asynchronous high-to-
low activity
“.sync_activity_up” specifies the synchronous
low-to-high activity (only valid for SYNC_INPUT
signals/buses)
“.sync_activity_down” specifies the synchronous
high-to-low activity (only valid for SYNC_INPUT
signals/buses)

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Xilinx ChipScope Pro Specifications

General IconGeneral
BrandXilinx
ModelChipScope Pro
CategoryComputer Hardware
LanguageEnglish

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