Xilinx ChipScope Pro User Manual

ChipScope Pro Software and Cores User Guide www.xilinx.com 55
UG029 (v14.3) October 16, 2012
ChipScope Pro Analyzer Client Interface
Token
Tokens are string labels that are defined in a separate ASCII file and can be assigned to a
particular bus value. These labels can be useful in applications such as address decoding
and state machines. The token file (.tok extension) has a very simple format, and can be
created or edited in any text editor. Tokens are in the form NAME=VALUE where NAME
is the token name and VALUE is the token value (hex, binary, or decimal). Values are hex
by default. To specify a radix for the value, append \b (binary), \u (unsigned decimal), \h
(hex) to the value.
A default token can be used to set a default token value when no other VALUE matches are
found. The @DEFAULT_TOKEN key can be used to set the default token name. The token
name "HEX" is used if no @DEFAULT_TOKEN line is used. The comment character in a
token file is "#". The first non-comment line of the token file must be
"@FILE_VERSION=1.0.0".
Note: The "=" sign is a reserved character and cannot be part of the TOKEN string.
Below is an example token file:
#File version
@FILE_VERSION=1.0.0
# Default token value
@DEFAULT_TOKEN=ERROR
# Explicit token values
ZERO=00
ONE=01
TWO=02
THREE=11\b
FOUR=4\h
FIVE=101\b
SIX=6
SEVEN=111\b
EIGHT=1000\b
NINE=9\h
TEN=A\h
Tokens are chosen by selecting a bus, then choosing Bus Radix > Tok en from the
right-click menu. A dialog box opens and you can choose the token file. If the bus is wider
than the token values (for example, the bus is 8 bits wide while the specified tokens are
only 4 bits wide), the tokens are padded to equal the width of the bus, using zeroes in the
most-significant bit positions.
Deleting Buses
To delete a bus, right-click it and select Delete Bus. The bus is immediately deleted in
every data view it is resident.
Type and Activity Persistence (VIO only)
VIO signals have two additional properties: Type and Activity Persistence. See “VIO
Bus/Signal Activity Persistence,” page 77 for explanations of these properties.

Xilinx ChipScope Pro Specifications

General

Brand	Xilinx
Model	ChipScope Pro
Category	Computer Hardware
Language	English

Summary

Chapter 1: Introduction

ChipScope Pro Tools Overview

Overview of ChipScope Pro tools for FPGA debugging and analysis.

ChipScope Pro Tools Description

Brief description of various ChipScope Pro tools and cores.

System Requirements

Outlines the necessary operating system and software tools for ChipScope Pro.

Chapter 2: Using the Core Generator Tools

Overview

Introduction to using the Xilinx CORE Generator tool for ChipScope Pro cores.

Generating Cores for ICON, ILA, VIO and ATC2 Cores

Instructions for generating ICON, ILA, VIO, and ATC2 cores.

Chapter 3: Using the ChipScope Pro Core Inserter

ChipScope Pro Core Inserter Overview

Description of the post-synthesis tool for inserting debug cores.

Using the ChipScope Pro Core Inserter with ISE Project Navigator

Guide for integrating the Core Inserter with Project Navigator.

ChipScope Pro Core Inserter Features

Details on working with projects, preferences, and inserting cores.

Chapter 4: Using the ChipScope Pro Analyzer

ChipScope Pro Analyzer Overview

Introduction to the ChipScope Pro Analyzer tool for debugging.

ChipScope Pro Analyzer Client Interface

Description of the GUI components of the ChipScope Pro Analyzer client.

Trigger Setup Window

Configuration interface for setting up triggers for ILA cores.

Waveform Window

Displays captured data as a waveform, similar to logic analyzers.

Chapter 5: ChipScope Engine Tcl Interface

Overview

Introduction to Tcl scripting access for JTAG and ChipScope cores.

CSE/Tcl Command Summary

Summary of CSE/Tcl commands categorized for JTAG, FPGA, and cores.

CseJtag Tcl Commands

Detailed description of JTAG interface status and control commands.

Appendix A: ChipScope Pro Tools Troubleshooting Guide

ChipScope Pro Tools Installation Troubleshooting

Guidance on common errors and issues with ChipScope Pro tool installation.

Xilinx JTAG Programming Cable Troubleshooting

How to troubleshoot common Xilinx JTAG cable connection issues.

ChipScope Pro Analyzer Core Troubleshooting

Deals with issues in core detection, triggering, and data display.

Appendix B: References

Documents specific to multi-gigabit serial transceivers:

Lists documents related to multi-gigabit serial transceivers.

Xilinx Tools and Solutions

References to Xilinx tools and solutions documentation.