Xilinx ChipScope Pro User Manual

ChipScope Pro Software and Cores User Guide www.xilinx.com 177
UG029 (v14.3) October 16, 2012
CseJtag Tcl Commands
::chipscope::csejtag_db parse_bsdl_file
This subcommand is used to extract device information from a Boundary Scan Description
Language (BSDL) file.
Syntax
::chipscope::csejtag_db parse_bsdl_file handle filename
Arguments
Returns
A list in the format:
{deviceName irlen idcode cmd_bypass}
Where:
deviceName
String containing the name of the device
irlen
Number of bits in the IR of the device
idcode
IDCODE of the device
cmd_bypass
String containing the BYPASS instruction for the device (usually all ones)
An exception is thrown if the subcommand fails.
Example
Extract device information from the file device.bsd.
%::chipscope::csejtag_db parse_bsdl_file $handle “device.bsd”
Back to list of all CseJtag Tcl Commands
Table 5-45: Arguments for Subcommand ::chipscope::csejtag_db parse_bsdl_file
Argument Type Description
handle
Required
Handle to the session that is returned by
::chipscope::csejtag_session create.
filename Filename of local BSDL file.

Xilinx ChipScope Pro Specifications

General

Brand	Xilinx
Model	ChipScope Pro
Category	Computer Hardware
Language	English

Summary

Chapter 1: Introduction

ChipScope Pro Tools Overview

Overview of ChipScope Pro tools for FPGA debugging and analysis.

ChipScope Pro Tools Description

Brief description of various ChipScope Pro tools and cores.

System Requirements

Outlines the necessary operating system and software tools for ChipScope Pro.

Chapter 2: Using the Core Generator Tools

Overview

Introduction to using the Xilinx CORE Generator tool for ChipScope Pro cores.

Generating Cores for ICON, ILA, VIO and ATC2 Cores

Instructions for generating ICON, ILA, VIO, and ATC2 cores.

Chapter 3: Using the ChipScope Pro Core Inserter

ChipScope Pro Core Inserter Overview

Description of the post-synthesis tool for inserting debug cores.

Using the ChipScope Pro Core Inserter with ISE Project Navigator

Guide for integrating the Core Inserter with Project Navigator.

ChipScope Pro Core Inserter Features

Details on working with projects, preferences, and inserting cores.

Chapter 4: Using the ChipScope Pro Analyzer

ChipScope Pro Analyzer Overview

Introduction to the ChipScope Pro Analyzer tool for debugging.

ChipScope Pro Analyzer Client Interface

Description of the GUI components of the ChipScope Pro Analyzer client.

Trigger Setup Window

Configuration interface for setting up triggers for ILA cores.

Waveform Window

Displays captured data as a waveform, similar to logic analyzers.

Chapter 5: ChipScope Engine Tcl Interface

Overview

Introduction to Tcl scripting access for JTAG and ChipScope cores.

CSE/Tcl Command Summary

Summary of CSE/Tcl commands categorized for JTAG, FPGA, and cores.

CseJtag Tcl Commands

Detailed description of JTAG interface status and control commands.

Appendix A: ChipScope Pro Tools Troubleshooting Guide

ChipScope Pro Tools Installation Troubleshooting

Guidance on common errors and issues with ChipScope Pro tool installation.

Xilinx JTAG Programming Cable Troubleshooting

How to troubleshoot common Xilinx JTAG cable connection issues.

ChipScope Pro Analyzer Core Troubleshooting

Deals with issues in core detection, triggering, and data display.

Appendix B: References

Documents specific to multi-gigabit serial transceivers:

Lists documents related to multi-gigabit serial transceivers.

Xilinx Tools and Solutions

References to Xilinx tools and solutions documentation.