Xilinx ChipScope Pro User Manual

ChipScope Pro Software and Cores User Guide www.xilinx.com 77
UG029 (v14.3) October 16, 2012
ChipScope Pro Analyzer Features
− Text: ASCII text field
− Push button (either active-High or active-Low)
− Toggle button
− Pulse train (synchronous outputs only)
− Single pulse (synchronous outputs only)
• VIO output buses have two valid control types:
− Text
− Pulse train (synchronous output buses only)
VIO Bus/Signal Activity Persistence
The persistence of a signal indicates how long the activity is displayed in the Value column
(see
“Value Column,” page 77 for a description of signal activity).
If the persistence is:
• Infinite: The activity is displayed in the column forever.
• Long: The activity is displayed in the column for 80 times the sample period
• Short: The activity is displayed in the column for 8 times the sample period
When the time limit on the persistence expires, a new activity is displayed. If no activity
occurred in the last sample cycle, no activity is displayed in the Value column.
Bus and Signal Reordering
Buses and signals can be reordered in the Waveform window. Click a signal or bus, and
drag it to its new location. A red line then appears in the Bus/Signal column indicating the
potential drop location.
Cut/Copy/Paste/Delete Signals and Buses
Individual signals and buses can be cut, copied, pasted, or deleted using right-click menus.
Either right-click a signal or bus and select the operation desired, or use the standard
Windows key combinations (Ctrl+X for cut, Ctrl+C for copy, Ctrl+V for paste, Del for
delete).
Value Column
The Value column displays the current value of each signal in the console. In the case of
VIO core inputs, those cells are non-editable. Buses are displayed according to their
selected radix. The VIO core inputs are updated periodically according to the selection in
the JTAG Scan Rate toolbar options. Each of the VIO core inputs captures, along with the
current value of the signal, activity information about the signal because the last time the
input was queried. At high design speeds, it is possible for a signal to be sampled as a 0,
then have the signal transition from a 0 to a 1, then back to a 0 again before the signal is
sampled again.
In the case of synchronous inputs, the activity is also detected with respect to the design
clock. This can be useful in detecting glitches. If a 0 to 1 transition is detected, an up arrow
appears alongside the value. If a 1 to 0 transition is detected, a down arrow appears. If both
are detected, a two-headed arrow is displayed. The length of time the activity is displayed
in the table is called the persistence. The persistence is also individually selectable via the
right-click menu.

Xilinx ChipScope Pro Specifications

General

Brand	Xilinx
Model	ChipScope Pro
Category	Computer Hardware
Language	English