Xilinx ChipScope Pro User Manual

ChipScope Pro Software and Cores User Guide www.xilinx.com 53
UG029 (v14.3) October 16, 2012
ChipScope Pro Analyzer Client Interface
level of hierarchy in the tree. To access the context-sensitive menu, right-click the node in
the tree. Device and unit renaming, child window opening, device configuration, and
project operations can all be done through these menus.
To rename a device or core unit node in the project tree, right-click the node and select
Rename. To end the editing, press Enter or the up or down arrow key, or click another
node in the tree.
Signal Browser
The signal browser displays all the signals for the ILA or VIO core selected in the project
tree. Signals can be renamed, grouped into buses, and added to the various data views
using context-sensitive menus in the signal browser.
Renaming Signals, Buses, and Triggers Ports
To rename a signal, bus, or trigger port name in the signal browser, double-click it, or right-
click and select Rename. To end the editing, press Enter or the up or down arrow key, or
click another node in the tree.
Adding/Removing Signals from Views
To remove all the signals from either the waveform or listing view, right-click any data
signal or bus in the signal browser and select Clear All > Waveform or Clear All > Listing.
In the case of a VIO core, to remove all the signals from the VIO console, right-click any
signal or bus, and select Clear All > Console. Similarly, all signals and buses can be added
to the views through the Add All to View menu options. Selected signals and buses can be
added through the Add to View menu options.
To select a contiguous group of signals and buses, click the first signal, hold down the Shift
key, and click the last signal in the group. To select a non-contiguous group of signals and
buses, click each of the signals/buses in turn while holding down the Ctrl key. When you
use this method, the order of the signals in the bus are in the order in which you select
them.
Combining and Adding Signals Into Buses
For ILA cores, only data signals can be combined into buses. For VIO cores, signals of a
particular type can be grouped together to form buses. To combine signals into buses,
select the signals using the Shift or Ctrl keys as described above. When the Shift key is
used, the uppermost signal in the tree is the LSB after the bus is created. If the Ctrl key is
used, the order of signals in the bus matches the order in which the signals are clicked, the
first signal being the LSB.
After you have selected the signals, right-click any selected signal and select Move to Bus
> New Bus. A new bus is created at the top of the Data Signals and Buses sub-tree (in the
case of ILA cores) or at the top of that particular sub-tree (in the case of VIO). To add a
signal or signals into an existing bus, select the signals and select Move to Bus, and then
the bus name in the following submenu. Added signals always go on the MSB-end of the
bus. The Move to Bus operation removes the signal(s) from the list of individual signals
when they are combined into the bus. The Copy to Bus operation is the same as Move to
Bus except the signals remain as individual signals in the list.

Xilinx ChipScope Pro Specifications

General

Brand	Xilinx
Model	ChipScope Pro
Category	Computer Hardware
Language	English