Zynq-7000 PCB Design Guide www.xilinx.com 10
UG933 (v1.8) November 7, 2014
Chapter 2: PCB Technology Basics
Z-direction spacing of signal trace layers to reference plane layers (defined by total board
thickness and number of board layers) is a defining factor in trace impedance.Trace width
(defined by AP SoC package ball pitch and PCB via manufacturing constraints) is another
factor in trace impedance. A designer often has little control over trace impedance in area
of the via array beneath the AP SoC. When traces escape the via array, their width can
change to the width of the target impedance (usually 50Ω single-ended).
Decoupling capacitor placement and discrete termination resistor placement are other
areas of trade-off optimization. DFM constraints often define a keep-out area around the
perimeter of the AP SoC (device footprint) where no discrete components can be placed.
The purpose of the keep-out area is to allow room for assembly and rework where
necessary. For this reason, the area just outside the keep-out area is one where components
compete for placement. It is up to the PCB designer to determine the high priority
components. Decoupling capacitor placement constraints are described in Chapter 3,
Power Distribution System. Termination resistor placement constraints must be determined
through signal integrity simulation, using IBIS or SPICE models.
Transmission Lines
The combination of a signal trace and a reference plane forms a transmission line. All I/O
signals in a PCB system travel through transmission lines. For single-ended I/O interfaces,
both the signal trace and the reference plane are necessary to transmit a signal from one
place to another on the PCB. For differential I/O interfaces, the transmission line is formed
by the combination of two traces and a reference plane.
While the presence of a reference plane is not strictly necessary in the case of differential
signals, it is necessary for practical implementation of differential traces in PCBs. Good
signal integrity in a PCB system is dependent on having transmission lines with controlled
impedance. Impedance is determined by the geometry of the traces and the signal trace
and the reference plane.
The dielectric constant of the material in the vicinity of the trace and reference plane is a
property of the PCB laminate materials, and in the case of surface traces, a property of the
air or fluid surrounding the board. PCB laminate is typically a variant of FR4, though it can
also be an exotic material.
While the dielectric constant of the laminate varies from board to board, it is fairly constant
within one board. Therefore, the relative impedance of transmission lines in a PCB is defined
most strongly by the trace geometries and tolerances. Impedance variance can occur based
on the presence or absence of glass in a local portion of the laminate weave, but this rarely
poses issues except in high-speed (>6 Gb/s) interfaces.
To Next Page
Loading...
Need help?
General
