Zynq-7000 PCB Design Guide www.xilinx.com 26
UG933 (v1.8) November 7, 2014
Chapter 3: Power Distribution System
• Both mounting inductances are reduced by placing power planes close to the PCB
stackup’s top half and placing the capacitors on the top surface (reducing the
capacitor’s via length).
• If power planes are placed in the PCB stackup’s bottom half, the capacitors must be
mounted on the PCB backside. In this case, AP SoC mounting vias are already long, and
making the capacitor vias long (by coming down from the top surface) is a bad
practice. A better practice is to take advantage of the short distance between the
underside of the PCB and the power plane of interest, mounting capacitors on the
underside.
PCB Stackup and Layer Order
V
CC
and ground plane placement in the PCB stackup (the layer order) has a significant
impact on the parasitic inductances of power current paths. Layer order must be considered
early in the design process:
• High-priority supplies should be placed closer to the AP SoC (in the PCB stackup’s top
half)
• Low-priority supplies should be placed farther from the AP SoC (in the PCB stackup’s
bottom half)
Power supplies with high transient current should have the associated V
CC
planes close to
the top surface (AP SoC side) of the PCB stackup. This decreases the vertical distance (V
CC
and GND via length) that currents travel before reaching the associated V
CC
and GND
planes. To reduce spreading inductance, every V
CC
plane should have an adjacent GND
plane in the PCB stackup. The skin effect causes high-frequency currents to couple tightly,
and the GND plane adjacent to a specific V
CC
plane tends to carry the majority of the
current complementary to that in the V
CC
plane. Thus, adjacent V
CC
and GND planes are
treated as a pair.
Not all V
CC
and GND plane pairs reside in the PCB stackup’s top half because manufacturing
constraints typically require a symmetrical PCB stackup around the center (with respect to
dielectric thicknesses and etched copper areas). The PCB designer chooses the priority of
the V
CC
and GND plane pairs: high priority pairs carry high transient currents and are placed
high in the stackup, while low priority pairs carry lower transient currents (or can tolerate
more noise) and are placed in the lower part of the stackup.
Capacitor Effective Frequency
Every capacitor has a narrow frequency band where it is most effective as a decoupling
capacitor. This band is centered at the capacitor’s self-resonant frequency F
RSELF
. The
effective frequency bands of some capacitors are wider than others. A capacitor’s ESR
determines the capacitor’s quality (Q) factor, and the Q factor can determine the width of
the effective frequency band:
• Tantalum capacitors generally have a very wide effective band.
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