Xilinx Zynq-7000 Design Guide

Zynq-7000 PCB Design Guide www.xilinx.com 6
UG933 (v1.8) November 7, 2014
Chapter 1
Introduction
About This Guide
This guide provides information on PCB design for the Zynq®-7000 All Programmable SoC
(AP SoC), with a focus on strategies for making design decisions at the PCB and interface
level.
This Zynq-7000 All Programmable SoC PCB Design Guide, part of an overall set of
documentation on the Zynq-7000 AP SoC, is available on the Xilinx website at
www.xilinx.com/zynq
.
Additional Support Resources
For additional information regarding PCB materials, traces, and design techniques for high
speed signals, refer to chapters four and five of UG483
, 7 Series FPGAs PCB Guide. A
comprehensive list of all additional resources is provided in Appendix A, Additional
Resources and Legal Notices.
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Xilinx Zynq-7000 Specifications

General

Series	Zynq-7000
Number of Cores	Dual-core
Processor Speed	Up to 1 GHz
Device Type	SoC
Logic Cells	Up to 350K
DSP Slices	Up to 900
External Memory Interfaces	DDR3, DDR2, LPDDR2
I/O Standards	LVCMOS, HSTL, SSTL
Operating Temperature	-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package Options	Various BGA packages
I/O Voltage	3.3V